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authorVasant Hegde <vasant.hegde@amd.com>2023-09-21 12:21:45 +0300
committerJoerg Roedel <jroedel@suse.de>2023-09-25 13:39:06 +0300
commit92e2bd56a5f9fc44313fda802a43a63cc2a9c8f6 (patch)
tree98429c4437a967e722bc5411b644d5b71b7e3873 /drivers/iommu/amd/amd_iommu_types.h
parent739eb25514c90aa8ea053ed4d2b971f531e63ded (diff)
downloadlinux-92e2bd56a5f9fc44313fda802a43a63cc2a9c8f6.tar.xz
iommu/amd: Introduce iommu_dev_data.flags to track device capabilities
Currently we use struct iommu_dev_data.iommu_v2 to keep track of the device ATS, PRI, and PASID capabilities. But these capabilities can be enabled independently (except PRI requires ATS support). Hence, replace the iommu_v2 variable with a flags variable, which keep track of the device capabilities. From commit 9bf49e36d718 ("PCI/ATS: Handle sharing of PF PRI Capability with all VFs"), device PRI/PASID is shared between PF and any associated VFs. Hence use pci_pri_supported() and pci_pasid_features() instead of pci_find_ext_capability() to check device PRI/PASID support. Signed-off-by: Vasant Hegde <vasant.hegde@amd.com> Reviewed-by: Jason Gunthorpe <jgg@nvidia.com> Reviewed-by: Jerry Snitselaar <jsnitsel@redhat.com> Link: https://lore.kernel.org/r/20230921092147.5930-13-vasant.hegde@amd.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'drivers/iommu/amd/amd_iommu_types.h')
-rw-r--r--drivers/iommu/amd/amd_iommu_types.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/iommu/amd/amd_iommu_types.h b/drivers/iommu/amd/amd_iommu_types.h
index 87fa39c490e8..07f8919ee34e 100644
--- a/drivers/iommu/amd/amd_iommu_types.h
+++ b/drivers/iommu/amd/amd_iommu_types.h
@@ -811,7 +811,8 @@ struct iommu_dev_data {
struct protection_domain *domain; /* Domain the device is bound to */
struct device *dev;
u16 devid; /* PCI Device ID */
- bool iommu_v2; /* Device can make use of IOMMUv2 */
+
+ u32 flags; /* Holds AMD_IOMMU_DEVICE_FLAG_<*> */
int ats_qdep;
u8 ats_enabled :1; /* ATS state */
u8 pri_tlp :1; /* PASID TLB required for