diff options
| author | Vasant Hegde <vasant.hegde@amd.com> | 2023-06-28 08:16:24 +0300 |
|---|---|---|
| committer | Joerg Roedel <jroedel@suse.de> | 2023-07-14 17:19:36 +0300 |
| commit | 274c2218b8b29ea2e0404f97d52040deb16d42dd (patch) | |
| tree | c3625caa3ed9601624ebfe8896fcfc98c64b1152 /drivers/iommu/amd | |
| parent | 386ae59bd7db4eafc74bdfdcf60182c2171aea2a (diff) | |
| download | linux-274c2218b8b29ea2e0404f97d52040deb16d42dd.tar.xz | |
iommu/amd: Handle PPR log overflow
Some ATS-capable peripherals can issue requests to the processor to service
peripheral page requests using PCIe PRI (the Page Request Interface). IOMMU
supports PRI using PPR log buffer. IOMMU writes PRI request to PPR log
buffer and sends PPR interrupt to host. When there is no space in the
PPR log buffer (PPR log overflow) it will set PprOverflow bit in 'MMIO
Offset 2020h IOMMU Status Register'. When this happens PPR log needs to be
restarted as specified in IOMMU spec [1] section 2.6.2.
When handling the event it just resumes the PPR log without resizing
(similar to the way event and GA log overflow is handled).
Failing to handle PPR overflow means device may not work properly as
IOMMU stops processing new PPR events from device.
[1] https://www.amd.com/system/files/TechDocs/48882_3.07_PUB.pdf
Reviewed-by: Jerry Snitselaar <jsnitsel@redhat.com>
Reviewed-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Reviewed-by: Joao Martins <joao.m.martins@oracle.com>
Signed-off-by: Vasant Hegde <vasant.hegde@amd.com>
Link: https://lore.kernel.org/r/20230628051624.5792-3-vasant.hegde@amd.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'drivers/iommu/amd')
| -rw-r--r-- | drivers/iommu/amd/amd_iommu.h | 1 | ||||
| -rw-r--r-- | drivers/iommu/amd/amd_iommu_types.h | 2 | ||||
| -rw-r--r-- | drivers/iommu/amd/init.c | 11 | ||||
| -rw-r--r-- | drivers/iommu/amd/iommu.c | 9 |
4 files changed, 22 insertions, 1 deletions
diff --git a/drivers/iommu/amd/amd_iommu.h b/drivers/iommu/amd/amd_iommu.h index 0c35018239ce..8c61c19dabc4 100644 --- a/drivers/iommu/amd/amd_iommu.h +++ b/drivers/iommu/amd/amd_iommu.h @@ -16,6 +16,7 @@ irqreturn_t amd_iommu_int_handler(int irq, void *data); void amd_iommu_apply_erratum_63(struct amd_iommu *iommu, u16 devid); void amd_iommu_restart_event_logging(struct amd_iommu *iommu); void amd_iommu_restart_ga_log(struct amd_iommu *iommu); +void amd_iommu_restart_ppr_log(struct amd_iommu *iommu); int amd_iommu_init_devices(void); void amd_iommu_uninit_devices(void); void amd_iommu_init_notifier(void); diff --git a/drivers/iommu/amd/amd_iommu_types.h b/drivers/iommu/amd/amd_iommu_types.h index 7c436ba2a0a2..c8150eaf5c0e 100644 --- a/drivers/iommu/amd/amd_iommu_types.h +++ b/drivers/iommu/amd/amd_iommu_types.h @@ -124,7 +124,9 @@ #define MMIO_STATUS_EVT_INT_MASK BIT(1) #define MMIO_STATUS_COM_WAIT_INT_MASK BIT(2) #define MMIO_STATUS_EVT_RUN_MASK BIT(3) +#define MMIO_STATUS_PPR_OVERFLOW_MASK BIT(5) #define MMIO_STATUS_PPR_INT_MASK BIT(6) +#define MMIO_STATUS_PPR_RUN_MASK BIT(7) #define MMIO_STATUS_GALOG_RUN_MASK BIT(8) #define MMIO_STATUS_GALOG_OVERFLOW_MASK BIT(9) #define MMIO_STATUS_GALOG_INT_MASK BIT(10) diff --git a/drivers/iommu/amd/init.c b/drivers/iommu/amd/init.c index 7fab6ecb6295..e78d7c4f41bd 100644 --- a/drivers/iommu/amd/init.c +++ b/drivers/iommu/amd/init.c @@ -800,6 +800,17 @@ void amd_iommu_restart_ga_log(struct amd_iommu *iommu) } /* + * This function restarts ppr logging in case the IOMMU experienced + * PPR log overflow. + */ +void amd_iommu_restart_ppr_log(struct amd_iommu *iommu) +{ + amd_iommu_restart_log(iommu, "PPR", CONTROL_PPRINT_EN, + CONTROL_PPRLOG_EN, MMIO_STATUS_PPR_RUN_MASK, + MMIO_STATUS_PPR_OVERFLOW_MASK); +} + +/* * This function resets the command buffer if the IOMMU stopped fetching * commands from it. */ diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c index 86c0ae34373b..f8316901a178 100644 --- a/drivers/iommu/amd/iommu.c +++ b/drivers/iommu/amd/iommu.c @@ -844,6 +844,7 @@ amd_iommu_set_pci_msi_domain(struct device *dev, struct amd_iommu *iommu) { } #define AMD_IOMMU_INT_MASK \ (MMIO_STATUS_EVT_OVERFLOW_MASK | \ MMIO_STATUS_EVT_INT_MASK | \ + MMIO_STATUS_PPR_OVERFLOW_MASK | \ MMIO_STATUS_PPR_INT_MASK | \ MMIO_STATUS_GALOG_OVERFLOW_MASK | \ MMIO_STATUS_GALOG_INT_MASK) @@ -863,11 +864,17 @@ irqreturn_t amd_iommu_int_thread(int irq, void *data) iommu_poll_events(iommu); } - if (status & MMIO_STATUS_PPR_INT_MASK) { + if (status & (MMIO_STATUS_PPR_INT_MASK | + MMIO_STATUS_PPR_OVERFLOW_MASK)) { pr_devel("Processing IOMMU PPR Log\n"); iommu_poll_ppr_log(iommu); } + if (status & MMIO_STATUS_PPR_OVERFLOW_MASK) { + pr_info_ratelimited("IOMMU PPR log overflow\n"); + amd_iommu_restart_ppr_log(iommu); + } + #ifdef CONFIG_IRQ_REMAP if (status & (MMIO_STATUS_GALOG_INT_MASK | MMIO_STATUS_GALOG_OVERFLOW_MASK)) { |