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authorZhen Lei <thunder.leizhen@huawei.com>2021-03-24 11:16:03 +0300
committerWill Deacon <will@kernel.org>2021-03-25 20:30:39 +0300
commit655c447c97d7fe462e6cd9e15809037be028bc70 (patch)
treea6ee2c5afa51233ffae1044b9ce85274d6efb47d /drivers/iommu/arm/arm-smmu-v3
parenta9aa2bb18ecbb8dd04a18d48e40d60e24ba9663d (diff)
downloadlinux-655c447c97d7fe462e6cd9e15809037be028bc70.tar.xz
iommu/arm-smmu-v3: add bit field SFM into GERROR_ERR_MASK
In arm_smmu_gerror_handler(), the value of the SMMU_GERROR register is filtered by GERROR_ERR_MASK. However, the GERROR_ERR_MASK does not contain the SFM bit. As a result, the subsequent error processing is not performed when only the SFM error occurs. Fixes: 48ec83bcbcf5 ("iommu/arm-smmu: Add initial driver support for ARM SMMUv3 devices") Reported-by: Rui Zhu <zhurui3@huawei.com> Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> Link: https://lore.kernel.org/r/20210324081603.1074-1-thunder.leizhen@huawei.com Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'drivers/iommu/arm/arm-smmu-v3')
-rw-r--r--drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
index f985817c967a..230b6f6b3901 100644
--- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
+++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h
@@ -115,7 +115,7 @@
#define GERROR_PRIQ_ABT_ERR (1 << 3)
#define GERROR_EVTQ_ABT_ERR (1 << 2)
#define GERROR_CMDQ_ERR (1 << 0)
-#define GERROR_ERR_MASK 0xfd
+#define GERROR_ERR_MASK 0x1fd
#define ARM_SMMU_GERRORN 0x64