diff options
author | Lu Baolu <baolu.lu@linux.intel.com> | 2020-01-02 03:18:13 +0300 |
---|---|---|
committer | Joerg Roedel <jroedel@suse.de> | 2020-01-07 16:05:57 +0300 |
commit | 8e3391cfdcd40eb4034014f8e6f8e9cbeb5335e7 (patch) | |
tree | 0505ba915b457d87fe1bec90d53fa440bf61a503 /drivers/iommu/intel-iommu.c | |
parent | 10f8008f0f884c3f8b6c8ea8f0f84540beda86be (diff) | |
download | linux-8e3391cfdcd40eb4034014f8e6f8e9cbeb5335e7.tar.xz |
iommu/vt-d: Loose requirement for flush queue initializaton
Currently if flush queue initialization fails, we return error
or enforce the system-wide strict mode. These are unnecessary
because we always check the existence of a flush queue before
queuing any iova's for lazy flushing. Printing a informational
message is enough.
Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'drivers/iommu/intel-iommu.c')
-rw-r--r-- | drivers/iommu/intel-iommu.c | 14 |
1 files changed, 6 insertions, 8 deletions
diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c index 4631b1796482..34723f6be672 100644 --- a/drivers/iommu/intel-iommu.c +++ b/drivers/iommu/intel-iommu.c @@ -1854,15 +1854,15 @@ static int domain_init(struct dmar_domain *domain, struct intel_iommu *iommu, { int adjust_width, agaw; unsigned long sagaw; - int err; + int ret; init_iova_domain(&domain->iovad, VTD_PAGE_SIZE, IOVA_START_PFN); if (!intel_iommu_strict) { - err = init_iova_flush_queue(&domain->iovad, + ret = init_iova_flush_queue(&domain->iovad, iommu_flush_iova, iova_entry_free); - if (err) - return err; + if (ret) + pr_info("iova flush queue initialization failed\n"); } domain_reserve_special_ranges(domain); @@ -5222,10 +5222,8 @@ static struct iommu_domain *intel_iommu_domain_alloc(unsigned type) ret = init_iova_flush_queue(&dmar_domain->iovad, iommu_flush_iova, iova_entry_free); - if (ret) { - pr_warn("iova flush queue initialization failed\n"); - intel_iommu_strict = 1; - } + if (ret) + pr_info("iova flush queue initialization failed\n"); } domain_update_iommu_cap(dmar_domain); |