summaryrefslogtreecommitdiff
path: root/drivers/iommu/intel_irq_remapping.c
diff options
context:
space:
mode:
authorFeng Wu <feng.wu@intel.com>2015-10-15 05:19:11 +0300
committerJoerg Roedel <jroedel@suse.de>2015-10-15 17:21:55 +0300
commit344cb4e0b6f3a0dbef0643eacb4946338eb228c0 (patch)
tree2141ccf81ee92feef6f2073009df3523607cd847 /drivers/iommu/intel_irq_remapping.c
parentdfddb969edf021f21a45fc6fd019db4f99d12308 (diff)
downloadlinux-344cb4e0b6f3a0dbef0643eacb4946338eb228c0.tar.xz
iommu/vt-d: Use cmpxchg16b to update posted format IRTE atomically
If IRTE is in posted format, the 'pda' field goes across the 64-bit boundary, we need use cmpxchg16b to atomically update it. We only expose posted-interrupt when X86_FEATURE_CX16 is supported and use to update it atomically. Signed-off-by: Feng Wu <feng.wu@intel.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'drivers/iommu/intel_irq_remapping.c')
-rw-r--r--drivers/iommu/intel_irq_remapping.c33
1 files changed, 30 insertions, 3 deletions
diff --git a/drivers/iommu/intel_irq_remapping.c b/drivers/iommu/intel_irq_remapping.c
index bdc52cc6ed23..a50468e7d8c2 100644
--- a/drivers/iommu/intel_irq_remapping.c
+++ b/drivers/iommu/intel_irq_remapping.c
@@ -169,8 +169,26 @@ static int modify_irte(struct irq_2_iommu *irq_iommu,
index = irq_iommu->irte_index + irq_iommu->sub_handle;
irte = &iommu->ir_table->base[index];
- set_64bit(&irte->low, irte_modified->low);
- set_64bit(&irte->high, irte_modified->high);
+#if defined(CONFIG_HAVE_CMPXCHG_DOUBLE)
+ if ((irte->pst == 1) || (irte_modified->pst == 1)) {
+ bool ret;
+
+ ret = cmpxchg_double(&irte->low, &irte->high,
+ irte->low, irte->high,
+ irte_modified->low, irte_modified->high);
+ /*
+ * We use cmpxchg16 to atomically update the 128-bit IRTE,
+ * and it cannot be updated by the hardware or other processors
+ * behind us, so the return value of cmpxchg16 should be the
+ * same as the old value.
+ */
+ WARN_ON(!ret);
+ } else
+#endif
+ {
+ set_64bit(&irte->low, irte_modified->low);
+ set_64bit(&irte->high, irte_modified->high);
+ }
__iommu_flush_cache(iommu, irte, sizeof(*irte));
rc = qi_flush_iec(iommu, index, 0);
@@ -727,7 +745,16 @@ static inline void set_irq_posting_cap(void)
struct intel_iommu *iommu;
if (!disable_irq_post) {
- intel_irq_remap_ops.capability |= 1 << IRQ_POSTING_CAP;
+ /*
+ * If IRTE is in posted format, the 'pda' field goes across the
+ * 64-bit boundary, we need use cmpxchg16b to atomically update
+ * it. We only expose posted-interrupt when X86_FEATURE_CX16
+ * is supported. Actually, hardware platforms supporting PI
+ * should have X86_FEATURE_CX16 support, this has been confirmed
+ * with Intel hardware guys.
+ */
+ if ( cpu_has_cx16 )
+ intel_irq_remap_ops.capability |= 1 << IRQ_POSTING_CAP;
for_each_iommu(iommu, drhd)
if (!cap_pi_support(iommu->cap)) {