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authorYong Wu <yong.wu@mediatek.com>2019-08-24 06:01:59 +0300
committerJoerg Roedel <jroedel@suse.de>2019-08-30 16:57:27 +0300
commit50822b0b948fabfc8bcee9a89d031c276b135506 (patch)
tree5f06ee8dd3bedb878485e651b787466c85c48ff4 /drivers/iommu/mtk_iommu.h
parentacb3c92a61306a8bc3b6bb8ed72977201affdd9a (diff)
downloadlinux-50822b0b948fabfc8bcee9a89d031c276b135506.tar.xz
iommu/mediatek: Move reset_axi into plat_data
In mt8173 and mt8183, 0x48 is REG_MMU_STANDARD_AXI_MODE while it is REG_MMU_CTRL in the other SoCs, and the bits meaning is completely different with the REG_MMU_STANDARD_AXI_MODE. This patch moves this property to plat_data, it's also a preparing patch for mt8183. Signed-off-by: Yong Wu <yong.wu@mediatek.com> Reviewed-by: Nicolas Boichat <drinkcat@chromium.org> Reviewed-by: Evan Green <evgreen@chromium.org> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'drivers/iommu/mtk_iommu.h')
-rw-r--r--drivers/iommu/mtk_iommu.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/iommu/mtk_iommu.h b/drivers/iommu/mtk_iommu.h
index d1a1d8887a0e..8d3b525b8752 100644
--- a/drivers/iommu/mtk_iommu.h
+++ b/drivers/iommu/mtk_iommu.h
@@ -38,7 +38,7 @@ struct mtk_iommu_plat_data {
/* HW will use the EMI clock if there isn't the "bclk". */
bool has_bclk;
-
+ bool reset_axi;
unsigned char larbid_remap[MTK_LARB_NR_MAX];
};