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authorMagnus Damm <damm+renesas@opensource.se>2017-10-16 15:30:07 +0300
committerAlex Williamson <alex.williamson@redhat.com>2017-11-06 20:29:39 +0300
commit1c894225bf5b1cdffac0c6ef935b61273203d7d5 (patch)
treed047688f577b97c591d81f072fb70b2b55bd0d91 /drivers/iommu
parentcda52fcd999f389c6f24f079910a62e53912d411 (diff)
downloadlinux-1c894225bf5b1cdffac0c6ef935b61273203d7d5.tar.xz
iommu/ipmmu-vmsa: IPMMU device is 40-bit bus master
The r8a7795 IPMMU supports 40-bit bus mastering. Both the coherent DMA mask and the streaming DMA mask are set to unlock the 40-bit address space for coherent allocations and streaming operations. Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
Diffstat (limited to 'drivers/iommu')
-rw-r--r--drivers/iommu/ipmmu-vmsa.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/iommu/ipmmu-vmsa.c b/drivers/iommu/ipmmu-vmsa.c
index 9cde61970bb5..6b74ec62f4b4 100644
--- a/drivers/iommu/ipmmu-vmsa.c
+++ b/drivers/iommu/ipmmu-vmsa.c
@@ -903,6 +903,7 @@ static int ipmmu_probe(struct platform_device *pdev)
spin_lock_init(&mmu->lock);
bitmap_zero(mmu->ctx, IPMMU_CTX_MAX);
mmu->features = of_device_get_match_data(&pdev->dev);
+ dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(40));
/* Map I/O memory and request IRQ. */
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);