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authorSakari Ailus <sakari.ailus@linux.intel.com>2020-09-15 21:53:26 +0300
committerMauro Carvalho Chehab <mchehab+huawei@kernel.org>2020-12-07 18:04:33 +0300
commit6c7469e46b603f08462ef586a415a318134392b8 (patch)
tree7f2206d07a6a9299e8f17f0b5d7a36f45d22b414 /drivers/media/i2c/ccs-pll.h
parent9ec6e5b18e6660ccc7b1777a4a4108c6c1723c40 (diff)
downloadlinux-6c7469e46b603f08462ef586a415a318134392b8.tar.xz
media: ccs-pll: Add trivial dual PLL support
Add support for sensors that have separate VT and OP domain PLLs. This support is trivial in the sense that it aims for the same VT pixel rate than that on the CSI-2 bus. The vast majority of sensors is better supported by higher frequencies in VT domain in binned and possibly scaled configurations. Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Diffstat (limited to 'drivers/media/i2c/ccs-pll.h')
-rw-r--r--drivers/media/i2c/ccs-pll.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/media/i2c/ccs-pll.h b/drivers/media/i2c/ccs-pll.h
index 6255803eee38..517ee504f44a 100644
--- a/drivers/media/i2c/ccs-pll.h
+++ b/drivers/media/i2c/ccs-pll.h
@@ -29,6 +29,7 @@
#define CCS_PLL_FLAG_FLEXIBLE_OP_PIX_CLK_DIV BIT(5)
#define CCS_PLL_FLAG_FIFO_DERATING BIT(6)
#define CCS_PLL_FLAG_FIFO_OVERRATING BIT(7)
+#define CCS_PLL_FLAG_DUAL_PLL BIT(8)
/**
* struct ccs_pll_branch_fr - CCS PLL configuration (front)