diff options
author | Chen-Yu Tsai <wens@csie.org> | 2020-01-03 09:45:33 +0300 |
---|---|---|
committer | Mauro Carvalho Chehab <mchehab+huawei@kernel.org> | 2020-01-04 10:21:35 +0300 |
commit | 51e40a0dbe53cebe1f4b85bb47e250dc5a89b254 (patch) | |
tree | 4e7f22dbccf59b63904497f6fd34a3c7c0838625 /drivers/media/platform/sunxi/sun4i-csi/sun4i_csi.c | |
parent | 249b286171fa9c358e8d5c825b48c4ebea97c498 (diff) | |
download | linux-51e40a0dbe53cebe1f4b85bb47e250dc5a89b254.tar.xz |
media: sun4i-csi: Add support for A10 CSI1 camera sensor interface
The A10/A20 Allwinner SoCs have two camera sensor interface blocks,
named CSI0 and CSI1. The two have the same register layouts with
slightly different features:
- CSI0 has an image signal processor (ISP); CSI1 doesn't
- CSI0 can support up to four separate channels under CCIR656;
CSI1 can only support one
- CSI0 can support up to 16-bit wide bus with YUV422;
CSI1 can support up to 24-bit wide bus with YUV444
For now the driver doesn't support wide busses, nor CCIR656. So the
only relevant difference is whether a clock needs to be taken and
enabled for the ISP.
Add structs to record the differences, tie them to the compatible
strings, and deal with the ISP clock. Support for the new CSI1
hardware block is added as well.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Diffstat (limited to 'drivers/media/platform/sunxi/sun4i-csi/sun4i_csi.c')
-rw-r--r-- | drivers/media/platform/sunxi/sun4i-csi/sun4i_csi.c | 35 |
1 files changed, 30 insertions, 5 deletions
diff --git a/drivers/media/platform/sunxi/sun4i-csi/sun4i_csi.c b/drivers/media/platform/sunxi/sun4i-csi/sun4i_csi.c index b8b07c1de2a8..eff34ded6305 100644 --- a/drivers/media/platform/sunxi/sun4i-csi/sun4i_csi.c +++ b/drivers/media/platform/sunxi/sun4i-csi/sun4i_csi.c @@ -29,6 +29,12 @@ #include "sun4i_csi.h" +struct sun4i_csi_traits { + unsigned int channels; + unsigned int max_width; + bool has_isp; +}; + static const struct media_entity_operations sun4i_csi_video_entity_ops = { .link_validate = v4l2_subdev_link_validate, }; @@ -156,6 +162,10 @@ static int sun4i_csi_probe(struct platform_device *pdev) subdev = &csi->subdev; vdev = &csi->vdev; + csi->traits = of_device_get_match_data(&pdev->dev); + if (!csi->traits) + return -EINVAL; + /* * On Allwinner SoCs, some high memory bandwidth devices do DMA * directly over the memory bus (called MBUS), instead of the @@ -199,10 +209,12 @@ static int sun4i_csi_probe(struct platform_device *pdev) return PTR_ERR(csi->bus_clk); } - csi->isp_clk = devm_clk_get(&pdev->dev, "isp"); - if (IS_ERR(csi->isp_clk)) { - dev_err(&pdev->dev, "Couldn't get our ISP clock\n"); - return PTR_ERR(csi->isp_clk); + if (csi->traits->has_isp) { + csi->isp_clk = devm_clk_get(&pdev->dev, "isp"); + if (IS_ERR(csi->isp_clk)) { + dev_err(&pdev->dev, "Couldn't get our ISP clock\n"); + return PTR_ERR(csi->isp_clk); + } } csi->ram_clk = devm_clk_get(&pdev->dev, "ram"); @@ -280,8 +292,21 @@ static int sun4i_csi_remove(struct platform_device *pdev) return 0; } +static const struct sun4i_csi_traits sun4i_a10_csi1_traits = { + .channels = 1, + .max_width = 24, + .has_isp = false, +}; + +static const struct sun4i_csi_traits sun7i_a20_csi0_traits = { + .channels = 4, + .max_width = 16, + .has_isp = true, +}; + static const struct of_device_id sun4i_csi_of_match[] = { - { .compatible = "allwinner,sun7i-a20-csi0" }, + { .compatible = "allwinner,sun4i-a10-csi1", .data = &sun4i_a10_csi1_traits }, + { .compatible = "allwinner,sun7i-a20-csi0", .data = &sun7i_a20_csi0_traits }, { /* Sentinel */ } }; MODULE_DEVICE_TABLE(of, sun4i_csi_of_match); |