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author | Mauro Carvalho Chehab <mchehab@redhat.com> | 2012-11-23 19:46:50 +0400 |
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committer | Mauro Carvalho Chehab <mchehab@redhat.com> | 2012-11-23 19:46:50 +0400 |
commit | 6d9a06f27a640967fc95a36ccb2f2d69e2e71f8a (patch) | |
tree | 48de3a34a5e6523107f7229f092d84d6335faf55 /drivers/media/platform | |
parent | b41a536cf9806c3478b2fa68d59edafd0787e8aa (diff) | |
download | linux-6d9a06f27a640967fc95a36ccb2f2d69e2e71f8a.tar.xz |
Revert "[media] siano: fix build with allmodconfig"
This reverts commit 6ee28d94c9bfa0640a7c94c289ca0df239d90a0d.
The patch got some alien code there, not sure why. Revert it to apply
it properly.
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/media/platform')
-rw-r--r-- | drivers/media/platform/omap3isp/isppreview.c | 37 |
1 files changed, 11 insertions, 26 deletions
diff --git a/drivers/media/platform/omap3isp/isppreview.c b/drivers/media/platform/omap3isp/isppreview.c index 479e5c862b7b..1ae1c0909ed1 100644 --- a/drivers/media/platform/omap3isp/isppreview.c +++ b/drivers/media/platform/omap3isp/isppreview.c @@ -200,10 +200,10 @@ static void preview_enable_invalaw(struct isp_prev_device *prev, bool enable) if (enable) isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR, - ISPPRV_PCR_INVALAW); + ISPPRV_PCR_WIDTH | ISPPRV_PCR_INVALAW); else isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR, - ISPPRV_PCR_INVALAW); + ISPPRV_PCR_WIDTH | ISPPRV_PCR_INVALAW); } /* @@ -1014,7 +1014,7 @@ static void preview_config_averager(struct isp_prev_device *prev, u8 average) /* * preview_config_input_format - Configure the input format * @prev: The preview engine - * @info: Sink pad format information + * @format: Format on the preview engine sink pad * * Enable and configure CFA interpolation for Bayer formats and disable it for * greyscale formats. @@ -1025,29 +1025,22 @@ static void preview_config_averager(struct isp_prev_device *prev, u8 average) * reordered to support non-GRBG Bayer patterns. */ static void preview_config_input_format(struct isp_prev_device *prev, - const struct isp_format_info *info) + const struct v4l2_mbus_framefmt *format) { struct isp_device *isp = to_isp_device(prev); struct prev_params *params; - if (info->bpp == 8) - isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR, - ISPPRV_PCR_WIDTH); - else - isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR, - ISPPRV_PCR_WIDTH); - - switch (info->flavor) { - case V4L2_MBUS_FMT_SGRBG8_1X8: + switch (format->code) { + case V4L2_MBUS_FMT_SGRBG10_1X10: prev->params.cfa_order = 0; break; - case V4L2_MBUS_FMT_SRGGB8_1X8: + case V4L2_MBUS_FMT_SRGGB10_1X10: prev->params.cfa_order = 1; break; - case V4L2_MBUS_FMT_SBGGR8_1X8: + case V4L2_MBUS_FMT_SBGGR10_1X10: prev->params.cfa_order = 2; break; - case V4L2_MBUS_FMT_SGBRG8_1X8: + case V4L2_MBUS_FMT_SGBRG10_1X10: prev->params.cfa_order = 3; break; default: @@ -1396,7 +1389,6 @@ static unsigned int preview_max_out_width(struct isp_prev_device *prev) static void preview_configure(struct isp_prev_device *prev) { struct isp_device *isp = to_isp_device(prev); - const struct isp_format_info *info; struct v4l2_mbus_framefmt *format; unsigned long flags; u32 update; @@ -1410,19 +1402,17 @@ static void preview_configure(struct isp_prev_device *prev) /* PREV_PAD_SINK */ format = &prev->formats[PREV_PAD_SINK]; - info = omap3isp_video_format_info(format->code); preview_adjust_bandwidth(prev); - preview_config_input_format(prev, info); + preview_config_input_format(prev, format); preview_config_input_size(prev, active); if (prev->input == PREVIEW_INPUT_CCDC) preview_config_inlineoffset(prev, 0); else preview_config_inlineoffset(prev, - ALIGN(format->width, 0x20) * - DIV_ROUND_UP(info->bpp, 8)); + ALIGN(format->width, 0x20) * 2); preview_setup_hw(prev, update, active); @@ -1719,11 +1709,6 @@ __preview_get_crop(struct isp_prev_device *prev, struct v4l2_subdev_fh *fh, /* previewer format descriptions */ static const unsigned int preview_input_fmts[] = { - V4L2_MBUS_FMT_Y8_1X8, - V4L2_MBUS_FMT_SGRBG8_1X8, - V4L2_MBUS_FMT_SRGGB8_1X8, - V4L2_MBUS_FMT_SBGGR8_1X8, - V4L2_MBUS_FMT_SGBRG8_1X8, V4L2_MBUS_FMT_Y10_1X10, V4L2_MBUS_FMT_SGRBG10_1X10, V4L2_MBUS_FMT_SRGGB10_1X10, |