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authorJacopo Mondi <jacopo+renesas@jmondi.org>2020-11-26 10:47:57 +0300
committerMauro Carvalho Chehab <mchehab+huawei@kernel.org>2020-12-07 17:07:23 +0300
commitfb25ca37317200fa97ea6b8952e07958f06da7a6 (patch)
tree11c18c0fda4b1349d3f8f4972bfd0cd447d2cd04 /drivers/media/test-drivers/vivid/vivid-core.c
parentaa821b2b92699692d7479567481bd807fc8a6d2d (diff)
downloadlinux-fb25ca37317200fa97ea6b8952e07958f06da7a6.tar.xz
media: rcar-vin: Mask VNCSI_IFMD register
The VNCSI_IFMD register controls the data expansion mode and the channel routing between the CSI-2 receivers and VIN instances. According to the chip manual revision 2.20 not all fields are available for all the SoCs: - V3M, V3H and E3 do not support the DES1 field has they do not feature a CSI20 receiver. - D3 only supports parallel input, and the whole register shall always be written as 0. Inspect the per-SoC channel routing table where the available CSI-2 instances are reported and configure VNCSI_IFMD accordingly. This patch supports this BSP change commit: https://github.com/renesas-rcar/linux-bsp/commit/f54697394457 ("media: rcar-vin: Fix VnCSI_IFMD register access for r8a77990") [hverkuil: replace BSP commit ID with BSP URL] Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Suggested-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
Diffstat (limited to 'drivers/media/test-drivers/vivid/vivid-core.c')
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