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authorRobin van der Gracht <robin@protonic.nl>2011-11-29 15:09:03 +0400
committerSamuel Ortiz <sameo@linux.intel.com>2012-01-09 03:37:33 +0400
commit2161891a0a7bcad6ee8819bb324ee4a031bc8a95 (patch)
tree99fdd22dd2e0c8e1f24a573ca80ea5766aaf1839 /drivers/mfd/mc13xxx-core.c
parent99f09bebbe4e9e008a4e0555340494840c6bd644 (diff)
downloadlinux-2161891a0a7bcad6ee8819bb324ee4a031bc8a95.tar.xz
mfd: Fixed unconditional reset of the mc13xxx ADC reading enable bits
When the ADC is being prepared for a single or multiple channel reading, the adc0 register is reconfigured without taking the lithium cell, charge current and battery current reading enable bits into account. Which results in clearing the bits. Signed-off-by: Robin van der Gracht <robin@protonic.nl> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
Diffstat (limited to 'drivers/mfd/mc13xxx-core.c')
-rw-r--r--drivers/mfd/mc13xxx-core.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/mfd/mc13xxx-core.c b/drivers/mfd/mc13xxx-core.c
index 441738048458..d0d3dfafba5c 100644
--- a/drivers/mfd/mc13xxx-core.c
+++ b/drivers/mfd/mc13xxx-core.c
@@ -615,13 +615,13 @@ int mc13xxx_adc_do_conversion(struct mc13xxx *mc13xxx, unsigned int mode,
break;
case MC13XXX_ADC_MODE_SINGLE_CHAN:
- adc0 |= old_adc0 & MC13XXX_ADC0_TSMOD_MASK;
+ adc0 |= old_adc0 & MC13XXX_ADC0_CONFIG_MASK;
adc1 |= (channel & 0x7) << MC13XXX_ADC1_CHAN0_SHIFT;
adc1 |= MC13XXX_ADC1_RAND;
break;
case MC13XXX_ADC_MODE_MULT_CHAN:
- adc0 |= old_adc0 & MC13XXX_ADC0_TSMOD_MASK;
+ adc0 |= old_adc0 & MC13XXX_ADC0_CONFIG_MASK;
adc1 |= 4 << MC13XXX_ADC1_CHAN1_SHIFT;
break;