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authorSeungwon Jeon <tgih.jun@samsung.com>2014-04-23 12:14:58 +0400
committerChris Ball <chris@printf.net>2014-05-13 02:06:06 +0400
commit0a5b6438ee482696360bb013e67b8488f63d3e9e (patch)
tree1db1f058b17823a6ae4722c21d7f916e129694c4 /drivers/mmc/core/debugfs.c
parent577fb13199b11d8cd75609183649be4b5561243f (diff)
downloadlinux-0a5b6438ee482696360bb013e67b8488f63d3e9e.tar.xz
mmc: add support for HS400 mode of eMMC5.0
This patch adds HS400 mode support for eMMC5.0 device. HS400 mode is high speed DDR interface timing from HS200. Clock frequency is up to 200MHz and only 8-bit bus width is supported. In addition, tuning process of HS200 is required to synchronize the command response on the CMD line because CMD input timing for HS400 mode is the same as HS200 mode. Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com> Reviewed-by: Jackey Shen <jackey.shen@amd.com> Tested-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <chris@printf.net>
Diffstat (limited to 'drivers/mmc/core/debugfs.c')
-rw-r--r--drivers/mmc/core/debugfs.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/mmc/core/debugfs.c b/drivers/mmc/core/debugfs.c
index 1f730dbfaeea..91eb16223246 100644
--- a/drivers/mmc/core/debugfs.c
+++ b/drivers/mmc/core/debugfs.c
@@ -141,6 +141,9 @@ static int mmc_ios_show(struct seq_file *s, void *data)
case MMC_TIMING_MMC_HS200:
str = "mmc HS200";
break;
+ case MMC_TIMING_MMC_HS400:
+ str = "mmc HS400";
+ break;
default:
str = "invalid";
break;