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author | Yann Gautier <yann.gautier@foss.st.com> | 2023-06-19 14:51:18 +0300 |
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committer | Ulf Hansson <ulf.hansson@linaro.org> | 2023-06-20 12:44:40 +0300 |
commit | 27bdc37c390af01af72ad3750cafe19b459bdf93 (patch) | |
tree | 74dd09bc34530862de37efd86c8d17ada695e219 /drivers/mmc/host/mmci.h | |
parent | ea9ca04119734c2b84691276fef2c018e9fd68ae (diff) | |
download | linux-27bdc37c390af01af72ad3750cafe19b459bdf93.tar.xz |
mmc: mmci: stm32: manage block gap hardware flow control
In stm32 sdmmc variant revision v3.0, a block gap hardware flow control
should be used with bus speed modes SDR104 and HS200.
It is enabled by writing a non-null value to the new added register
MMCI_STM32_FIFOTHRR.
The threshold will be 2^(N-1) bytes, so we can use the ffs() function to
compute the value N to be written to the register. The threshold used
should be the data block size, but must not be bigger than the FIFO size.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Link: https://lore.kernel.org/r/20230619115120.64474-5-yann.gautier@foss.st.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/mmc/host/mmci.h')
-rw-r--r-- | drivers/mmc/host/mmci.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/mmc/host/mmci.h b/drivers/mmc/host/mmci.h index b1968cafc58b..361954249d04 100644 --- a/drivers/mmc/host/mmci.h +++ b/drivers/mmc/host/mmci.h @@ -218,6 +218,11 @@ #define MCI_STM32_BUSYD0ENDMASK BIT(21) #define MMCIMASK1 0x040 + +/* STM32 sdmmc data FIFO threshold register */ +#define MMCI_STM32_FIFOTHRR 0x044 +#define MMCI_STM32_THR_MASK GENMASK(3, 0) + #define MMCIFIFOCNT 0x048 #define MMCIFIFO 0x080 /* to 0x0bc */ |