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authorMiquel Raynal <miquel.raynal@bootlin.com>2020-05-07 13:52:31 +0300
committerMiquel Raynal <miquel.raynal@bootlin.com>2020-05-11 10:51:42 +0300
commitce8148d7b8f204a18188e3cd7386c8dddbb461a1 (patch)
tree49afca727a95a4a4859674b1ee99306324a9a472 /drivers/mtd/nand/raw/stm32_fmc2_nand.c
parent96d627bdf112d116a79c86435550cd18b9a9d82b (diff)
downloadlinux-ce8148d7b8f204a18188e3cd7386c8dddbb461a1.tar.xz
mtd: rawnand: Rename a NAND chip option
NAND controller drivers can set the NAND_USE_BOUNCE_BUFFER flag to a chip 'option' field. With this flag, the core is responsible of providing DMA-able buffers. The current behavior is to not force the use of a bounce buffer when the core thinks this is not needed. So in the end the name is a bit misleading, because in theory we will always have a DMA buffer but in practice it will not always be a bounce buffer. Rename this flag NAND_USES_DMA to be more accurate. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200507105241.14299-4-miquel.raynal@bootlin.com
Diffstat (limited to 'drivers/mtd/nand/raw/stm32_fmc2_nand.c')
-rw-r--r--drivers/mtd/nand/raw/stm32_fmc2_nand.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/mtd/nand/raw/stm32_fmc2_nand.c b/drivers/mtd/nand/raw/stm32_fmc2_nand.c
index 46b7d04e2c87..c5fde09e0175 100644
--- a/drivers/mtd/nand/raw/stm32_fmc2_nand.c
+++ b/drivers/mtd/nand/raw/stm32_fmc2_nand.c
@@ -1987,7 +1987,7 @@ static int stm32_fmc2_probe(struct platform_device *pdev)
chip->controller = &fmc2->base;
chip->options |= NAND_BUSWIDTH_AUTO | NAND_NO_SUBPAGE_WRITE |
- NAND_USE_BOUNCE_BUFFER;
+ NAND_USES_DMA;
/* Default ECC settings */
chip->ecc.mode = NAND_ECC_HW;