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authorChris Packham <chris.packham@alliedtelesis.co.nz>2023-05-25 03:31:53 +0300
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2023-06-09 11:34:05 +0300
commit62dcac528be74d62024d38e04524d6c824d61896 (patch)
tree435bfb77fd9fde6dd6941796f75e4231810aa5d2 /drivers/mtd
parent2187cb72b98bfa8fa21a0e4bfcc7084fc916b414 (diff)
downloadlinux-62dcac528be74d62024d38e04524d6c824d61896.tar.xz
mtd: rawnand: marvell: don't set the NAND frequency select
[ Upstream commit c4d28e30a8d0b979e4029465ab8f312ab6ce2644 ] marvell_nfc_setup_interface() uses the frequency retrieved from the clock associated with the nand interface to determine the timings that will be used. By changing the NAND frequency select without reflecting this in the clock configuration this means that the timings calculated don't correctly meet the requirements of the NAND chip. This hasn't been an issue up to now because of a different bug that was stopping the timings being updated after they were initially set. Fixes: b25251414f6e ("mtd: rawnand: marvell: Stop implementing ->select_chip()") Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20230525003154.2303012-2-chris.packham@alliedtelesis.co.nz Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'drivers/mtd')
-rw-r--r--drivers/mtd/nand/raw/marvell_nand.c4
1 files changed, 0 insertions, 4 deletions
diff --git a/drivers/mtd/nand/raw/marvell_nand.c b/drivers/mtd/nand/raw/marvell_nand.c
index 72069a864356..a57a1501449a 100644
--- a/drivers/mtd/nand/raw/marvell_nand.c
+++ b/drivers/mtd/nand/raw/marvell_nand.c
@@ -2891,10 +2891,6 @@ static int marvell_nfc_init(struct marvell_nfc *nfc)
regmap_update_bits(sysctrl_base, GENCONF_CLK_GATING_CTRL,
GENCONF_CLK_GATING_CTRL_ND_GATE,
GENCONF_CLK_GATING_CTRL_ND_GATE);
-
- regmap_update_bits(sysctrl_base, GENCONF_ND_CLK_CTRL,
- GENCONF_ND_CLK_CTRL_EN,
- GENCONF_ND_CLK_CTRL_EN);
}
/* Configure the DMA if appropriate */