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authorNaveen Mamindlapalli <naveenm@marvell.com>2022-09-10 10:54:15 +0300
committerDavid S. Miller <davem@davemloft.net>2022-09-17 22:13:41 +0300
commit2ef4e45d99b19fb16834616f47d21a9b76b0e5f4 (patch)
tree66fd6c82bb2345020e7b3cb989f91e5fb53f3dc2 /drivers/net/ethernet/marvell/octeontx2/af/mbox.h
parent2958d17a898416c6193431676f6130b68a2cb9fc (diff)
downloadlinux-2ef4e45d99b19fb16834616f47d21a9b76b0e5f4.tar.xz
octeontx2-af: Add PTP PPS Errata workaround on CN10K silicon
Errata: The ptp_clock_hi rollsover to zero one clock cycle before it reaches one second boundary. As a result, the pps threshold comparison fails after one second and the pps output signal won't toggle further. This patch workarounds the issue by programming the pps_lo_incr register to 500msec minus one clock cycle period, ensuring that the pps threshold comparison succeeds at one second rollover boundary and pps edge toggles. After that point, the driver will have enough time (~500msec) to reset the pps threshold value. After each one second boundary, hrtimer is invoked which resets the pps threshold value. Signed-off-by: Naveen Mamindlapalli <naveenm@marvell.com> Signed-off-by: Rakesh Babu Saladi <rsaladi2@marvell.com> Signed-off-by: Sunil Kovvuri Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/marvell/octeontx2/af/mbox.h')
-rw-r--r--drivers/net/ethernet/marvell/octeontx2/af/mbox.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
index d7762577e285..e26c3b0c4dcb 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
@@ -1471,6 +1471,7 @@ enum ptp_op {
PTP_OP_GET_CLOCK = 1,
PTP_OP_GET_TSTMP = 2,
PTP_OP_SET_THRESH = 3,
+ PTP_OP_EXTTS_ON = 4,
};
struct ptp_req {
@@ -1478,6 +1479,7 @@ struct ptp_req {
u8 op;
s64 scaled_ppm;
u64 thresh;
+ int extts_on;
};
struct ptp_rsp {