summaryrefslogtreecommitdiff
path: root/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
diff options
context:
space:
mode:
authorSunil Goutham <sgoutham@marvell.com>2018-10-10 15:44:29 +0300
committerDavid S. Miller <davem@davemloft.net>2018-10-10 20:06:02 +0300
commit756051e23cce593ced6c637c1b5a793d68164597 (patch)
tree06770af7c9bd85f2cf3cabb9b8f5b4a5dfec2417 /drivers/net/ethernet/marvell/octeontx2/af/mbox.h
parent746ea74241fa04f7a8c3146adc08b618d88681e2 (diff)
downloadlinux-756051e23cce593ced6c637c1b5a793d68164597.tar.xz
octeontx2-af: Configure block LF's MSIX vector offset
Firmware configures a certain number of MSIX vectors to each of enabled RVU PF/VF. When a block LF is attached to a PF/VF, number of MSIX vectors needed by that LF are set aside (out of PF/VF's total MSIX vectors) and LF's msix_offset is configured in HW. Also added support for a RVU PF/VF to retrieve that block LF's MSIX vector offset information from AF via mbox. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/marvell/octeontx2/af/mbox.h')
-rw-r--r--drivers/net/ethernet/marvell/octeontx2/af/mbox.h18
1 files changed, 18 insertions, 0 deletions
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
index 7280d4906d65..bedf0ee62450 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
@@ -122,6 +122,7 @@ static inline struct mbox_msghdr *otx2_mbox_alloc_msg(struct otx2_mbox *mbox,
M(READY, 0x001, msg_req, ready_msg_rsp) \
M(ATTACH_RESOURCES, 0x002, rsrc_attach, msg_rsp) \
M(DETACH_RESOURCES, 0x003, rsrc_detach, msg_rsp) \
+M(MSIX_OFFSET, 0x004, msg_req, msix_offset_rsp) \
/* CGX mbox IDs (range 0x200 - 0x3FF) */ \
/* NPA mbox IDs (range 0x400 - 0x5FF) */ \
/* SSO/SSOW mbox IDs (range 0x600 - 0x7FF) */ \
@@ -190,4 +191,21 @@ struct rsrc_detach {
u8 cptlfs:1;
};
+#define MSIX_VECTOR_INVALID 0xFFFF
+#define MAX_RVU_BLKLF_CNT 256
+
+struct msix_offset_rsp {
+ struct mbox_msghdr hdr;
+ u16 npa_msixoff;
+ u16 nix_msixoff;
+ u8 sso;
+ u8 ssow;
+ u8 timlfs;
+ u8 cptlfs;
+ u16 sso_msixoff[MAX_RVU_BLKLF_CNT];
+ u16 ssow_msixoff[MAX_RVU_BLKLF_CNT];
+ u16 timlf_msixoff[MAX_RVU_BLKLF_CNT];
+ u16 cptlf_msixoff[MAX_RVU_BLKLF_CNT];
+};
+
#endif /* MBOX_H */