diff options
| author | Shay Drory <shayd@nvidia.com> | 2021-11-23 13:50:19 +0300 |
|---|---|---|
| committer | Saeed Mahameed <saeedm@nvidia.com> | 2022-01-07 03:22:52 +0300 |
| commit | 061f5b23588a2b2a499643c8c798dcdb271bc059 (patch) | |
| tree | 9775794cf680d73448f1834424290ab4f756a827 /drivers/net/ethernet/mellanox/mlx5/core/pci_irq.h | |
| parent | 79b60ca83b6fa63ef307d2edcc77ee6581da8971 (diff) | |
| download | linux-061f5b23588a2b2a499643c8c798dcdb271bc059.tar.xz | |
net/mlx5: SF, Use all available cpu for setting cpu affinity
Currently all SFs are using the same CPUs. Spreading SF over CPUs, in
round-robin manner, in order to achieve better distribution of the SFs
over available CPUs.
Signed-off-by: Shay Drory <shayd@nvidia.com>
Reviewed-by: Moshe Shemesh <moshe@nvidia.com>
Reviewed-by: Parav Pandit <parav@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
Diffstat (limited to 'drivers/net/ethernet/mellanox/mlx5/core/pci_irq.h')
| -rw-r--r-- | drivers/net/ethernet/mellanox/mlx5/core/pci_irq.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/pci_irq.h b/drivers/net/ethernet/mellanox/mlx5/core/pci_irq.h index 5fee4ce57d6c..5c7e68bee43a 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/pci_irq.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/pci_irq.h @@ -20,12 +20,20 @@ struct mlx5_irq_pool { struct xarray irqs; u32 max_threshold; u32 min_threshold; + u16 *irqs_per_cpu; struct mlx5_core_dev *dev; }; +struct mlx5_irq_pool *mlx5_irq_pool_get(struct mlx5_core_dev *dev); +static inline bool mlx5_irq_pool_is_sf_pool(struct mlx5_irq_pool *pool) +{ + return !strncmp("mlx5_sf", pool->name, strlen("mlx5_sf")); +} + struct mlx5_irq *mlx5_irq_alloc(struct mlx5_irq_pool *pool, int i, const struct cpumask *affinity); int mlx5_irq_get_locked(struct mlx5_irq *irq); int mlx5_irq_read_locked(struct mlx5_irq *irq); +int mlx5_irq_put(struct mlx5_irq *irq); #endif /* __PCI_IRQ_H__ */ |