diff options
| author | Yevgeny Kliteynik <kliteyn@nvidia.com> | 2021-02-07 05:27:48 +0300 |
|---|---|---|
| committer | Saeed Mahameed <saeedm@nvidia.com> | 2021-04-20 06:17:34 +0300 |
| commit | 3442e0335e70f348728c17bca924ec507ad6358a (patch) | |
| tree | eb68bab5a482f1332381142be9e32596535c43ff /drivers/net/ethernet/mellanox/mlx5/core/steering/dr_matcher.c | |
| parent | 4923938d2fb589e6684e484c2e6031fae7048b02 (diff) | |
| download | linux-3442e0335e70f348728c17bca924ec507ad6358a.tar.xz | |
net/mlx5: DR, Add support for matching on geneve TLV option
Enable matching on tunnel geneve TLV option using the flex parser.
Signed-off-by: Muhammad Sammar <muhammads@nvidia.com>
Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
Diffstat (limited to 'drivers/net/ethernet/mellanox/mlx5/core/steering/dr_matcher.c')
| -rw-r--r-- | drivers/net/ethernet/mellanox/mlx5/core/steering/dr_matcher.c | 13 |
1 files changed, 11 insertions, 2 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_matcher.c b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_matcher.c index f83fea98cc46..0aa4a994fe77 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_matcher.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_matcher.c @@ -133,6 +133,11 @@ static bool dr_mask_is_tnl_geneve_set(struct mlx5dr_match_misc *misc) misc->geneve_opt_len; } +static bool dr_mask_is_tnl_geneve_tlv_opt(struct mlx5dr_match_misc3 *misc3) +{ + return misc3->geneve_tlv_option_0_data; +} + static bool dr_matcher_supp_tnl_geneve(struct mlx5dr_cmd_caps *caps) { @@ -360,10 +365,14 @@ static int dr_matcher_set_ste_builders(struct mlx5dr_matcher *matcher, if (dr_mask_is_tnl_vxlan_gpe(&mask, dmn)) mlx5dr_ste_build_tnl_vxlan_gpe(ste_ctx, &sb[idx++], &mask, inner, rx); - else if (dr_mask_is_tnl_geneve(&mask, dmn)) + else if (dr_mask_is_tnl_geneve(&mask, dmn)) { mlx5dr_ste_build_tnl_geneve(ste_ctx, &sb[idx++], &mask, inner, rx); - + if (dr_mask_is_tnl_geneve_tlv_opt(&mask.misc3)) + mlx5dr_ste_build_tnl_geneve_tlv_opt(ste_ctx, &sb[idx++], + &mask, &dmn->info.caps, + inner, rx); + } if (DR_MASK_IS_ETH_L4_MISC_SET(mask.misc3, outer)) mlx5dr_ste_build_eth_l4_misc(ste_ctx, &sb[idx++], &mask, inner, rx); |