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authorFlorian Fainelli <florian@openwrt.org>2012-04-11 11:18:38 +0400
committerDavid S. Miller <davem@davemloft.net>2012-04-13 00:06:24 +0400
commit2fa15bbdd8a1ac096819df29db8d69b063752bee (patch)
tree250b5b9033bf3064f140bcc6b6693fd6d33b03d3 /drivers/net/ethernet/rdc
parent0db0cfcc4ddff3226c8c721760b6a4eaf0e5229a (diff)
downloadlinux-2fa15bbdd8a1ac096819df29db8d69b063752bee.tar.xz
r6040: add a MAC operation timeout define
2048 is the usual value for busy-waiting on a register r/w, define it as MAC_DEF_TIMEOUT and use it where it is appropriate. Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/rdc')
-rw-r--r--drivers/net/ethernet/rdc/r6040.c8
1 files changed, 5 insertions, 3 deletions
diff --git a/drivers/net/ethernet/rdc/r6040.c b/drivers/net/ethernet/rdc/r6040.c
index fa2959689d87..9ffbf6e39b32 100644
--- a/drivers/net/ethernet/rdc/r6040.c
+++ b/drivers/net/ethernet/rdc/r6040.c
@@ -137,6 +137,8 @@
#define MBCR_DEFAULT 0x012A /* MAC Bus Control Register */
#define MCAST_MAX 3 /* Max number multicast addresses to filter */
+#define MAC_DEF_TIMEOUT 2048 /* Default MAC read/write operation timeout */
+
/* Descriptor status */
#define DSC_OWNER_MAC 0x8000 /* MAC is the owner of this descriptor */
#define DSC_RX_OK 0x4000 /* RX was successful */
@@ -204,7 +206,7 @@ static char version[] __devinitdata = DRV_NAME
/* Read a word data from PHY Chip */
static int r6040_phy_read(void __iomem *ioaddr, int phy_addr, int reg)
{
- int limit = 2048;
+ int limit = MAC_DEF_TIMEOUT;
u16 cmd;
iowrite16(MDIO_READ + reg + (phy_addr << 8), ioaddr + MMDIO);
@@ -222,7 +224,7 @@ static int r6040_phy_read(void __iomem *ioaddr, int phy_addr, int reg)
static void r6040_phy_write(void __iomem *ioaddr,
int phy_addr, int reg, u16 val)
{
- int limit = 2048;
+ int limit = MAC_DEF_TIMEOUT;
u16 cmd;
iowrite16(val, ioaddr + MMWD);
@@ -361,7 +363,7 @@ err_exit:
static void r6040_reset_mac(struct r6040_private *lp)
{
void __iomem *ioaddr = lp->base;
- int limit = 2048;
+ int limit = MAC_DEF_TIMEOUT;
u16 cmd;
iowrite16(MAC_RST, ioaddr + MCR1);