summaryrefslogtreecommitdiff
path: root/drivers/net/ethernet/wiznet
diff options
context:
space:
mode:
authorAkinobu Mita <akinobu.mita@gmail.com>2016-05-14 08:55:48 +0300
committerDavid S. Miller <davem@davemloft.net>2016-05-16 20:55:48 +0300
commitd41cd5f7e2fce8d3c5b1345a7cf9ed3f0d2d99c1 (patch)
tree09228413f8205e255ef04dda4fd9b013d349515b /drivers/net/ethernet/wiznet
parente9f0cd94c1697ad6c98422a1953105c8ffc515f3 (diff)
downloadlinux-d41cd5f7e2fce8d3c5b1345a7cf9ed3f0d2d99c1.tar.xz
net: w5100: fix MAC filtering for W5500
W5500 has different bit position for MAC filter in Socket n mode register from W5100 and W5200. Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Cc: Mike Sinkovsky <msink@permonline.ru> Cc: David S. Miller <davem@davemloft.net> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/wiznet')
-rw-r--r--drivers/net/ethernet/wiznet/w5100.c17
1 files changed, 13 insertions, 4 deletions
diff --git a/drivers/net/ethernet/wiznet/w5100.c b/drivers/net/ethernet/wiznet/w5100.c
index df0ba2b2b93a..7c6d5081242e 100644
--- a/drivers/net/ethernet/wiznet/w5100.c
+++ b/drivers/net/ethernet/wiznet/w5100.c
@@ -63,8 +63,9 @@ MODULE_LICENSE("GPL");
#define S0_REGS(priv) ((priv)->s0_regs)
#define W5100_S0_MR(priv) (S0_REGS(priv) + W5100_Sn_MR)
-#define S0_MR_MACRAW 0x04 /* MAC RAW mode (promiscuous) */
-#define S0_MR_MACRAW_MF 0x44 /* MAC RAW mode (filtered) */
+#define S0_MR_MACRAW 0x04 /* MAC RAW mode */
+#define S0_MR_MF 0x40 /* MAC Filter for W5100 and W5200 */
+#define W5500_S0_MR_MF 0x80 /* MAC Filter for W5500 */
#define W5100_S0_CR(priv) (S0_REGS(priv) + W5100_Sn_CR)
#define S0_CR_OPEN 0x01 /* OPEN command */
#define S0_CR_CLOSE 0x10 /* CLOSE command */
@@ -702,8 +703,16 @@ static int w5100_hw_reset(struct w5100_priv *priv)
static void w5100_hw_start(struct w5100_priv *priv)
{
- w5100_write(priv, W5100_S0_MR(priv), priv->promisc ?
- S0_MR_MACRAW : S0_MR_MACRAW_MF);
+ u8 mode = S0_MR_MACRAW;
+
+ if (!priv->promisc) {
+ if (priv->ops->chip_id == W5500)
+ mode |= W5500_S0_MR_MF;
+ else
+ mode |= S0_MR_MF;
+ }
+
+ w5100_write(priv, W5100_S0_MR(priv), mode);
w5100_command(priv, S0_CR_OPEN);
w5100_enable_intr(priv);
}