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authorAndy Fleming <afleming@freescale.com>2008-12-17 02:25:45 +0300
committerDavid S. Miller <davem@davemloft.net>2008-12-17 02:25:45 +0300
commit257d938a0c17838c740eb68f0005b041444ac2c2 (patch)
treede3625da9ab82bedf79c08e5672ff4185462356d /drivers/net/gianfar.c
parent5eeabf5150878018d7c7092042f3b681f5b554b5 (diff)
downloadlinux-257d938a0c17838c740eb68f0005b041444ac2c2.tar.xz
gianfar: Use gfar_halt to stop DMA in gfar_probe
gfar_halt does everything we want to do there, including disabling TX/RX. It also doesn't unnecessarily enable DMA if it's already stopped. Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/gianfar.c')
-rw-r--r--drivers/net/gianfar.c14
1 files changed, 1 insertions, 13 deletions
diff --git a/drivers/net/gianfar.c b/drivers/net/gianfar.c
index 2635f5bed77f..55e319fa7fe6 100644
--- a/drivers/net/gianfar.c
+++ b/drivers/net/gianfar.c
@@ -225,19 +225,7 @@ static int gfar_probe(struct platform_device *pdev)
/* Stop the DMA engine now, in case it was running before */
/* (The firmware could have used it, and left it running). */
- /* To do this, we write Graceful Receive Stop and Graceful */
- /* Transmit Stop, and then wait until the corresponding bits */
- /* in IEVENT indicate the stops have completed. */
- tempval = gfar_read(&priv->regs->dmactrl);
- tempval &= ~(DMACTRL_GRS | DMACTRL_GTS);
- gfar_write(&priv->regs->dmactrl, tempval);
-
- tempval = gfar_read(&priv->regs->dmactrl);
- tempval |= (DMACTRL_GRS | DMACTRL_GTS);
- gfar_write(&priv->regs->dmactrl, tempval);
-
- while (!(gfar_read(&priv->regs->ievent) & (IEVENT_GRSC | IEVENT_GTSC)))
- cpu_relax();
+ gfar_halt(dev);
/* Reset MAC layer */
gfar_write(&priv->regs->maccfg1, MACCFG1_SOFT_RESET);