diff options
| author | Ping-Ke Shih <pkshih@realtek.com> | 2024-02-29 10:45:07 +0300 |
|---|---|---|
| committer | Kalle Valo <kvalo@kernel.org> | 2024-03-05 21:54:45 +0300 |
| commit | 0cb01e0edf7829fa67b4d4c4e90003a61e182f60 (patch) | |
| tree | dc6c1994b6ef2fca653bdc6cd95609852b430e5b /drivers/net/wireless/realtek/rtw89/mac_be.c | |
| parent | 81e060584f1deb7f89df5c0b7897a96409cf6c2a (diff) | |
| download | linux-0cb01e0edf7829fa67b4d4c4e90003a61e182f60.tar.xz | |
wifi: rtw89: mac: add coexistence helpers {cfg/get}_plt
When hardware grant BT initially but transition to grant WiFi, the PLT
(polluted) bit is set to assist coexistence mechanism to debug if
grant signal is expected.
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://msgid.link/20240229074514.219276-2-pkshih@realtek.com
Diffstat (limited to 'drivers/net/wireless/realtek/rtw89/mac_be.c')
| -rw-r--r-- | drivers/net/wireless/realtek/rtw89/mac_be.c | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/drivers/net/wireless/realtek/rtw89/mac_be.c b/drivers/net/wireless/realtek/rtw89/mac_be.c index 320e88229971..c68fef0f55f1 100644 --- a/drivers/net/wireless/realtek/rtw89/mac_be.c +++ b/drivers/net/wireless/realtek/rtw89/mac_be.c @@ -1797,6 +1797,44 @@ static int trx_init_be(struct rtw89_dev *rtwdev) return 0; } +static +int rtw89_mac_cfg_plt_be(struct rtw89_dev *rtwdev, struct rtw89_mac_ax_plt *plt) +{ + u32 reg; + u16 val; + int ret; + + ret = rtw89_mac_check_mac_en(rtwdev, plt->band, RTW89_CMAC_SEL); + if (ret) + return ret; + + reg = rtw89_mac_reg_by_idx(rtwdev, R_BE_BT_PLT, plt->band); + val = (plt->tx & RTW89_MAC_AX_PLT_LTE_RX ? B_BE_TX_PLT_GNT_LTE_RX : 0) | + (plt->tx & RTW89_MAC_AX_PLT_GNT_BT_TX ? B_BE_TX_PLT_GNT_BT_TX : 0) | + (plt->tx & RTW89_MAC_AX_PLT_GNT_BT_RX ? B_BE_TX_PLT_GNT_BT_RX : 0) | + (plt->tx & RTW89_MAC_AX_PLT_GNT_WL ? B_BE_TX_PLT_GNT_WL : 0) | + (plt->rx & RTW89_MAC_AX_PLT_LTE_RX ? B_BE_RX_PLT_GNT_LTE_RX : 0) | + (plt->rx & RTW89_MAC_AX_PLT_GNT_BT_TX ? B_BE_RX_PLT_GNT_BT_TX : 0) | + (plt->rx & RTW89_MAC_AX_PLT_GNT_BT_RX ? B_BE_RX_PLT_GNT_BT_RX : 0) | + (plt->rx & RTW89_MAC_AX_PLT_GNT_WL ? B_BE_RX_PLT_GNT_WL : 0) | + B_BE_PLT_EN; + rtw89_write16(rtwdev, reg, val); + + return 0; +} + +static u16 rtw89_mac_get_plt_cnt_be(struct rtw89_dev *rtwdev, u8 band) +{ + u32 reg; + u16 cnt; + + reg = rtw89_mac_reg_by_idx(rtwdev, R_BE_BT_PLT, band); + cnt = rtw89_read32_mask(rtwdev, reg, B_BE_BT_PLT_PKT_CNT_MASK); + rtw89_write16_set(rtwdev, reg, B_BE_BT_PLT_RST); + + return cnt; +} + static int rtw89_set_hw_sch_tx_en_v2(struct rtw89_dev *rtwdev, u8 mac_idx, u32 tx_en, u32 tx_en_mask) { @@ -2439,6 +2477,9 @@ const struct rtw89_mac_gen_def rtw89_mac_gen_be = { .parse_phycap_map = rtw89_parse_phycap_map_be, .cnv_efuse_state = rtw89_cnv_efuse_state_be, + .cfg_plt = rtw89_mac_cfg_plt_be, + .get_plt_cnt = rtw89_mac_get_plt_cnt_be, + .get_txpwr_cr = rtw89_mac_get_txpwr_cr_be, .write_xtal_si = rtw89_mac_write_xtal_si_be, |