diff options
| author | Ping-Ke Shih <pkshih@realtek.com> | 2023-08-22 15:58:20 +0300 |
|---|---|---|
| committer | Kalle Valo <kvalo@kernel.org> | 2023-08-25 12:59:53 +0300 |
| commit | 9d87e7dc930e149def617c152f03ed97e3d7d899 (patch) | |
| tree | 58616c6ed026915362969159ed3f031596ee56cd /drivers/net/wireless/realtek/rtw89/reg.h | |
| parent | 3a7e4f56eb184da66b7f60d4b001ce0248a7b519 (diff) | |
| download | linux-9d87e7dc930e149def617c152f03ed97e3d7d899.tar.xz | |
wifi: rtw89: mac: define register address of rx_filter to generalize code
rx_filter is used to decide which kind of packets are received to driver,
or just dropped by MAC layer to reduce bus traffic.
The bit definitions of old and new chips are the sames, but only address
is changed, so define a field to generalize usage.
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20230822125822.23817-5-pkshih@realtek.com
Diffstat (limited to 'drivers/net/wireless/realtek/rtw89/reg.h')
| -rw-r--r-- | drivers/net/wireless/realtek/rtw89/reg.h | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/drivers/net/wireless/realtek/rtw89/reg.h b/drivers/net/wireless/realtek/rtw89/reg.h index cab07cc993f0..eab26039242a 100644 --- a/drivers/net/wireless/realtek/rtw89/reg.h +++ b/drivers/net/wireless/realtek/rtw89/reg.h @@ -3627,6 +3627,25 @@ #define R_BE_FILTER_MODEL_ADDR 0x0C04 +#define R_BE_RX_FLTR_OPT 0x11420 +#define R_BE_RX_FLTR_OPT_C1 0x15420 +#define B_BE_UID_FILTER_MASK GENMASK(31, 24) +#define B_BE_UNSPT_TYPE BIT(22) +#define B_BE_RX_MPDU_MAX_LEN_MASK GENMASK(21, 16) +#define B_BE_A_FTM_REQ BIT(14) +#define B_BE_A_ERR_PKT BIT(13) +#define B_BE_A_UNSUP_PKT BIT(12) +#define B_BE_A_CRC32_ERR BIT(11) +#define B_BE_A_BCN_CHK_RULE_MASK GENMASK(9, 8) +#define B_BE_A_BCN_CHK_EN BIT(7) +#define B_BE_A_MC_LIST_CAM_MATCH BIT(6) +#define B_BE_A_BC_CAM_MATCH BIT(5) +#define B_BE_A_UC_CAM_MATCH BIT(4) +#define B_BE_A_MC BIT(3) +#define B_BE_A_BC BIT(2) +#define B_BE_A_A1_MATCH BIT(1) +#define B_BE_SNIFFER_MODE BIT(0) + #define RR_MOD 0x00 #define RR_MOD_V1 0x10000 #define RR_MOD_IQK GENMASK(19, 4) |