diff options
| author | Ping-Ke Shih <pkshih@realtek.com> | 2024-01-24 06:36:33 +0300 |
|---|---|---|
| committer | Kalle Valo <kvalo@kernel.org> | 2024-02-01 13:19:51 +0300 |
| commit | b16daa62125e3f841a135c37dfd996cdf7e7960d (patch) | |
| tree | ae8410d50a3bf6dfe32f0d37c98ff2c3343e2351 /drivers/net/wireless/realtek/rtw89/reg.h | |
| parent | f8a7840e98a440f466954c0b9eed99a9f064a564 (diff) | |
| download | linux-b16daa62125e3f841a135c37dfd996cdf7e7960d.tar.xz | |
wifi: rtw89: 8922a: implement {stop,resume}_sch_tx and cfg_ppdu
To set TX/RX path or set channel, we need these helpers to stop TX and
restore settings. The sch_tx stands for scheduler TX channel, and the
cfg_ppdu is to stop reporting PPDU status, so we should stop them during
setting.
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://msgid.link/20240124033637.12330-3-pkshih@realtek.com
Diffstat (limited to 'drivers/net/wireless/realtek/rtw89/reg.h')
| -rw-r--r-- | drivers/net/wireless/realtek/rtw89/reg.h | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/drivers/net/wireless/realtek/rtw89/reg.h b/drivers/net/wireless/realtek/rtw89/reg.h index ec2559bde092..cdead0132d66 100644 --- a/drivers/net/wireless/realtek/rtw89/reg.h +++ b/drivers/net/wireless/realtek/rtw89/reg.h @@ -5502,6 +5502,14 @@ #define B_BE_DROP_NONDMA_PPDU BIT(2) #define B_BE_APPEND_FCS BIT(0) +#define R_BE_HW_PPDU_STATUS 0x9C30 +#define B_BE_FWD_RPKTTYPE_MASK GENMASK(31, 26) +#define B_BE_FWD_PPDU_PRTID_MASK GENMASK(25, 23) +#define B_BE_FWD_PPDU_FW_RLS BIT(22) +#define B_BE_FWD_PPDU_QUEID_MASK GENMASK(21, 16) +#define B_BE_FWD_OTHER_RPKT_MASK GENMASK(15, 8) +#define B_BE_FWD_PPDU_STAT_MASK GENMASK(7, 0) + #define R_BE_CUT_AMSDU_CTRL 0x9C94 #define B_BE_EN_CUT_AMSDU BIT(31) #define B_BE_CUT_AMSDU_CHKLEN_EN BIT(30) @@ -6143,6 +6151,28 @@ #define B_BE_SET_MUEDCATIMER_TF_0 BIT(4) #define B_BE_MUEDCA_EN_0 BIT(0) +#define R_BE_CTN_DRV_TXEN 0x10398 +#define R_BE_CTN_DRV_TXEN_C1 0x14398 +#define B_BE_CTN_TXEN_TWT_3 BIT(17) +#define B_BE_CTN_TXEN_TWT_2 BIT(16) +#define B_BE_CTN_TXEN_TWT_1 BIT(15) +#define B_BE_CTN_TXEN_TWT_0 BIT(14) +#define B_BE_CTN_TXEN_ULQ BIT(13) +#define B_BE_CTN_TXEN_BCNQ BIT(12) +#define B_BE_CTN_TXEN_HGQ BIT(11) +#define B_BE_CTN_TXEN_CPUMGQ BIT(10) +#define B_BE_CTN_TXEN_MGQ1 BIT(9) +#define B_BE_CTN_TXEN_MGQ BIT(8) +#define B_BE_CTN_TXEN_VO_1 BIT(7) +#define B_BE_CTN_TXEN_VI_1 BIT(6) +#define B_BE_CTN_TXEN_BK_1 BIT(5) +#define B_BE_CTN_TXEN_BE_1 BIT(4) +#define B_BE_CTN_TXEN_VO_0 BIT(3) +#define B_BE_CTN_TXEN_VI_0 BIT(2) +#define B_BE_CTN_TXEN_BK_0 BIT(1) +#define B_BE_CTN_TXEN_BE_0 BIT(0) +#define B_BE_CTN_TXEN_ALL_MASK GENMASK(17, 0) + #define R_BE_TB_CHK_CCA_NAV 0x103AC #define R_BE_TB_CHK_CCA_NAV_C1 0x143AC #define B_BE_TB_CHK_TX_NAV BIT(15) @@ -7144,6 +7174,20 @@ #define S_BE_BACAM_RST_ENT 1 #define S_BE_BACAM_RST_ALL 2 +#define R_BE_PPDU_STAT 0x11440 +#define R_BE_PPDU_STAT_C1 0x15440 +#define B_BE_STAT_IORST BIT(13) +#define B_BE_STAT_GCKDIS BIT(12) +#define B_BE_PPDU_STAT_WR_BW_MASK GENMASK(11, 10) +#define B_BE_PPDU_STAT_RPT_TRIG BIT(8) +#define B_BE_PPDU_STAT_RPT_DMA BIT(6) +#define B_BE_PPDU_STAT_RPT_CRC32 BIT(5) +#define B_BE_PPDU_STAT_RPT_ADDR BIT(4) +#define B_BE_APP_PLCP_HDR_RPT BIT(3) +#define B_BE_APP_RX_CNT_RPT BIT(2) +#define B_BE_PPDU_MAC_INFO BIT(1) +#define B_BE_PPDU_STAT_RPT_EN BIT(0) + #define R_BE_RX_SR_CTRL 0x1144A #define R_BE_RX_SR_CTRL_C1 0x1544A #define B_BE_SR_OP_MODE_MASK GENMASK(5, 4) |