summaryrefslogtreecommitdiff
path: root/drivers/net/wireless/realtek/rtw89/reg.h
diff options
context:
space:
mode:
authorPing-Ke Shih <pkshih@realtek.com>2024-02-09 09:52:26 +0300
committerKalle Valo <kvalo@kernel.org>2024-02-12 18:39:14 +0300
commitef95df598622a399b62b69b764682c21543b1d63 (patch)
tree9321fb67b4b7c110ffef5318665375d690911e37 /drivers/net/wireless/realtek/rtw89/reg.h
parent49ea98235ada68ee1e2cad660bbb2e8e2cd87670 (diff)
downloadlinux-ef95df598622a399b62b69b764682c21543b1d63.tar.xz
wifi: rtw89: 8922a: correct register definition and merge IO for ctrl_nbtg_bt_tx()
ctrl_nbtg_bt_tx is used to control AGC settings under non-shared path condition, which is affected by BT TX. To speed up IO, merge continual bit mask into one IO. Also, correct a register definition. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://msgid.link/20240209065229.34515-9-pkshih@realtek.com
Diffstat (limited to 'drivers/net/wireless/realtek/rtw89/reg.h')
-rw-r--r--drivers/net/wireless/realtek/rtw89/reg.h6
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/net/wireless/realtek/rtw89/reg.h b/drivers/net/wireless/realtek/rtw89/reg.h
index 31bdc7616749..26aa2d9bd526 100644
--- a/drivers/net/wireless/realtek/rtw89/reg.h
+++ b/drivers/net/wireless/realtek/rtw89/reg.h
@@ -8077,14 +8077,16 @@
#define R_S1_ADDCK 0x3E00
#define B_S1_ADDCK_I GENMASK(9, 0)
#define B_S1_ADDCK_Q GENMASK(19, 10)
-#define R_OP1DB_A 0x406B
+#define R_OP1DB_A 0x40B0
#define B_OP1DB_A GENMASK(31, 24)
#define R_OP1DB1_A 0x40BC
+#define B_TIA10_A GENMASK(15, 0)
#define B_TIA1_A GENMASK(15, 8)
#define B_TIA0_A GENMASK(7, 0)
#define R_BKOFF_A 0x40E0
#define B_BKOFF_IBADC_A GENMASK(23, 18)
#define R_BACKOFF_A 0x40E4
+#define B_LNA_IBADC_A GENMASK(29, 18)
#define B_BACKOFF_LNA_A GENMASK(29, 24)
#define B_BACKOFF_IBADC_A GENMASK(23, 18)
#define R_RXBY_WBADC_A 0x40F4
@@ -8140,11 +8142,13 @@
#define R_LNA_OP 0x44B0
#define B_LNA6 GENMASK(31, 24)
#define R_LNA_TIA 0x44BC
+#define B_TIA10_B GENMASK(15, 0)
#define B_TIA1_B GENMASK(15, 8)
#define B_TIA0_B GENMASK(7, 0)
#define R_BKOFF_B 0x44E0
#define B_BKOFF_IBADC_B GENMASK(23, 18)
#define R_BACKOFF_B 0x44E4
+#define B_LNA_IBADC_B GENMASK(29, 18)
#define B_BACKOFF_LNA_B GENMASK(29, 24)
#define B_BACKOFF_IBADC_B GENMASK(23, 18)
#define R_RXBY_WBADC_B 0x44F4