diff options
| author | Gustavo Pimentel <gustavo.pimentel@synopsys.com> | 2018-07-19 11:32:11 +0300 |
|---|---|---|
| committer | Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> | 2018-07-19 13:33:58 +0300 |
| commit | 4e965ede1856ed62c7ac8b7ad905a4a285e4a9f3 (patch) | |
| tree | 38d418faf5edaac16c3991f8ce09f0d63193ac63 /drivers/pci/controller/dwc/pcie-designware-plat.c | |
| parent | 53dd0c51f16be5f215d3ecad435062df99ee29ae (diff) | |
| download | linux-4e965ede1856ed62c7ac8b7ad905a4a285e4a9f3.tar.xz | |
PCI: dwc: Fix EP link notification implementation
Move specific features settings from EP shared code
(pcie-designware-ep.c) to the driver (pcie-designware-plat.c).
Previous implementation disables the EP link notification
by default for all SoCs that uses EP DesignWare IP, which affects
directly the dra7xx and artpec6 SoCs.
Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
Diffstat (limited to 'drivers/pci/controller/dwc/pcie-designware-plat.c')
| -rw-r--r-- | drivers/pci/controller/dwc/pcie-designware-plat.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/pci/controller/dwc/pcie-designware-plat.c b/drivers/pci/controller/dwc/pcie-designware-plat.c index 6e048c0b67f2..a37dc92a03c7 100644 --- a/drivers/pci/controller/dwc/pcie-designware-plat.c +++ b/drivers/pci/controller/dwc/pcie-designware-plat.c @@ -70,10 +70,13 @@ static const struct dw_pcie_ops dw_pcie_ops = { static void dw_plat_pcie_ep_init(struct dw_pcie_ep *ep) { struct dw_pcie *pci = to_dw_pcie_from_ep(ep); + struct pci_epc *epc = ep->epc; enum pci_barno bar; for (bar = BAR_0; bar <= BAR_5; bar++) dw_pcie_ep_reset_bar(pci, bar); + + epc->features |= EPC_FEATURE_NO_LINKUP_NOTIFIER; } static int dw_plat_pcie_ep_raise_irq(struct dw_pcie_ep *ep, u8 func_no, |