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authorBjorn Helgaas <bhelgaas@google.com>2016-11-29 17:14:47 +0300
committerBjorn Helgaas <bhelgaas@google.com>2016-11-29 17:14:47 +0300
commit45d004f4afefdd8d79916ee6d97a9ecd94bb1ffe (patch)
tree2d11b9eb2db44b9e229be0442764ae701ef8e06f /drivers/pci/setup-res.c
parent63880b230a4af502c56dde3d4588634c70c66006 (diff)
downloadlinux-45d004f4afefdd8d79916ee6d97a9ecd94bb1ffe.tar.xz
PCI: Update BARs using property bits appropriate for type
The BAR property bits (0-3 for memory BARs, 0-1 for I/O BARs) are supposed to be read-only, but we do save them in res->flags and include them when updating the BAR. Mask the I/O property bits with ~PCI_BASE_ADDRESS_IO_MASK (0x3) instead of PCI_REGION_FLAG_MASK (0xf) to make it obvious that we can't corrupt bits 2-3 of I/O addresses. Use PCI_ROM_ADDRESS_MASK for ROM BARs. This means we'll only check the top 21 bits (instead of the 28 bits we used to check) of a ROM BAR to see if the update was successful. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'drivers/pci/setup-res.c')
-rw-r--r--drivers/pci/setup-res.c11
1 files changed, 8 insertions, 3 deletions
diff --git a/drivers/pci/setup-res.c b/drivers/pci/setup-res.c
index d2a32d88d2ae..53bc0638cac6 100644
--- a/drivers/pci/setup-res.c
+++ b/drivers/pci/setup-res.c
@@ -59,12 +59,17 @@ void pci_update_resource(struct pci_dev *dev, int resno)
return;
pcibios_resource_to_bus(dev->bus, &region, res);
+ new = region.start;
- new = region.start | (res->flags & PCI_REGION_FLAG_MASK);
- if (res->flags & IORESOURCE_IO)
+ if (res->flags & IORESOURCE_IO) {
mask = (u32)PCI_BASE_ADDRESS_IO_MASK;
- else
+ new |= res->flags & ~PCI_BASE_ADDRESS_IO_MASK;
+ } else if (resno == PCI_ROM_RESOURCE) {
+ mask = (u32)PCI_ROM_ADDRESS_MASK;
+ } else {
mask = (u32)PCI_BASE_ADDRESS_MEM_MASK;
+ new |= res->flags & ~PCI_BASE_ADDRESS_MEM_MASK;
+ }
reg = pci_resource_bar(dev, resno, &type);
if (!reg)