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authorDan Williams <dan.j.williams@intel.com>2022-12-05 23:31:30 +0300
committerDan Williams <dan.j.williams@intel.com>2022-12-05 23:31:30 +0300
commite0f6fa0d425f745a887e640be66e22b45451e169 (patch)
treebe40c3330600fd5dad459161780cf3d5a0619318 /drivers/pci
parent95dddcb5e86381abddeb1ccab5b5826fdcc74c70 (diff)
parent6155ccc9ddf6642056f1c00c2851d1938d27a7f2 (diff)
downloadlinux-e0f6fa0d425f745a887e640be66e22b45451e169.tar.xz
Merge branch 'for-6.2/cxl-aer' into for-6.2/cxl
Pick up CXL AER handling and correctable error extensions. Resolve conflicts with cxl_pmem_wq reworks and RCH support.
Diffstat (limited to 'drivers/pci')
-rw-r--r--drivers/pci/pcie/aer.c8
1 files changed, 7 insertions, 1 deletions
diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c
index e2d8a74f83c3..625f7b2cafe4 100644
--- a/drivers/pci/pcie/aer.c
+++ b/drivers/pci/pcie/aer.c
@@ -961,8 +961,14 @@ static void handle_error_source(struct pci_dev *dev, struct aer_err_info *info)
if (aer)
pci_write_config_dword(dev, aer + PCI_ERR_COR_STATUS,
info->status);
- if (pcie_aer_is_native(dev))
+ if (pcie_aer_is_native(dev)) {
+ struct pci_driver *pdrv = dev->driver;
+
+ if (pdrv && pdrv->err_handler &&
+ pdrv->err_handler->cor_error_detected)
+ pdrv->err_handler->cor_error_detected(dev);
pcie_clear_device_status(dev);
+ }
} else if (info->severity == AER_NONFATAL)
pcie_do_recovery(dev, pci_channel_io_normal, aer_root_reset);
else if (info->severity == AER_FATAL)