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authorAlex Williamson <alex.williamson@redhat.com>2014-11-21 21:24:08 +0300
committerBjorn Helgaas <bhelgaas@google.com>2015-01-16 19:06:48 +0300
commit51e537387990dc1f00752103f314fd135cb94bc6 (patch)
tree93d6c4b45bf5f65ead423237e206cc1e1ee1f97f /drivers/pci
parentc3e59ee4e76686b0c84ca8faa1011d10cd4ca1b8 (diff)
downloadlinux-51e537387990dc1f00752103f314fd135cb94bc6.tar.xz
PCI: Add flag for devices that don't reset on D3hot->D0 transition
Per the PCI Power Management spec r1.2, sec 3.2.4, a device that advertises No_Soft_Reset == 0 in the PMCSR register (reported by lspci as "NoSoftRst-") should perform an internal reset when transitioning from D3hot to D0 via software control. Configuration context is lost and the device requires a full reinitialization sequence. Unfortunately the definition of "internal reset", beyond the application of the configuration context, is largely left to the interpretation of the specific device. Some devices don't seem to perform an "internal reset" even if they report No_Soft_Reset == 0. We still need to honor the PCI specification and restore PCI config context in the event that we do a PM reset, so we don't cache and modify the PCI_PM_CTRL_NO_SOFT_RESET bit for the device, but for interfaces where the intention is to reset the device, like pci_reset_function(), we need a mechanism to flag that PM reset (a D3hot->D0 transition) doesn't perform any significant "internal reset" of the device. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'drivers/pci')
-rw-r--r--drivers/pci/pci.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index e9d4fd861ba1..422bc0179e90 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -3197,7 +3197,7 @@ static int pci_pm_reset(struct pci_dev *dev, int probe)
{
u16 csr;
- if (!dev->pm_cap)
+ if (!dev->pm_cap || dev->dev_flags & PCI_DEV_FLAGS_NO_PM_RESET)
return -ENOTTY;
pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &csr);