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author | Chunfeng Yun <chunfeng.yun@mediatek.com> | 2021-12-18 11:28:00 +0300 |
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committer | Vinod Koul <vkoul@kernel.org> | 2021-12-24 07:36:37 +0300 |
commit | 1371b9a5632a637a93e3a7592c91f64d7067c369 (patch) | |
tree | c3e9c04d57f2dc6eded767ecff26c3038974f2a5 /drivers/phy/mediatek/phy-mtk-io.h | |
parent | 6f2b033cb883f64ad084a75f13634242c7e179a6 (diff) | |
download | linux-1371b9a5632a637a93e3a7592c91f64d7067c369.tar.xz |
phy: mediatek: add helpers to update bits of registers
Add three helpers mtk_phy_clear/set/update_bits() for registers operation
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/20211218082802.5256-3-chunfeng.yun@mediatek.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'drivers/phy/mediatek/phy-mtk-io.h')
-rw-r--r-- | drivers/phy/mediatek/phy-mtk-io.h | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/drivers/phy/mediatek/phy-mtk-io.h b/drivers/phy/mediatek/phy-mtk-io.h new file mode 100644 index 000000000000..500fcdab165d --- /dev/null +++ b/drivers/phy/mediatek/phy-mtk-io.h @@ -0,0 +1,38 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2021 MediaTek Inc. + * + * Author: Chunfeng Yun <chunfeng.yun@mediatek.com> + */ + +#ifndef __PHY_MTK_H__ +#define __PHY_MTK_H__ + +#include <linux/io.h> + +static inline void mtk_phy_clear_bits(void __iomem *reg, u32 bits) +{ + u32 tmp = readl(reg); + + tmp &= ~bits; + writel(tmp, reg); +} + +static inline void mtk_phy_set_bits(void __iomem *reg, u32 bits) +{ + u32 tmp = readl(reg); + + tmp |= bits; + writel(tmp, reg); +} + +static inline void mtk_phy_update_bits(void __iomem *reg, u32 mask, u32 val) +{ + u32 tmp = readl(reg); + + tmp &= ~mask; + tmp |= val & mask; + writel(tmp, reg); +} + +#endif |