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| author | Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> | 2022-11-02 11:18:34 +0300 |
|---|---|---|
| committer | Vinod Koul <vkoul@kernel.org> | 2022-11-10 10:15:45 +0300 |
| commit | 9ddcd920f8edfe65c3670fbd0b49db00e1e562fe (patch) | |
| tree | d4a41340eb70a0955c6a2cb0eb90623110d30fe2 /drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | |
| parent | 2584068a9ef4a7bff3b9302dd058a4c95ce68631 (diff) | |
| download | linux-9ddcd920f8edfe65c3670fbd0b49db00e1e562fe.tar.xz | |
phy: qcom-qmp-pcie: Fix high latency with 4x2 PHY when ASPM is enabled
The PCIe QMP 4x2 RC PHY generates high latency when ASPM is enabled. This
seem to be fixed by clearing the QPHY_V5_20_PCS_PCIE_PRESET_P10_POST
register of the pcs_misc register space.
Fixes: 2c91bf6bf290 ("phy: qcom-qmp: Add SM8450 PCIe1 PHY support")
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20221102081835.41892-1-manivannan.sadhasivam@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'drivers/phy/qualcomm/phy-qcom-qmp-pcie.c')
| -rw-r--r-- | drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c index 43bd4576bee2..cb45f53a965b 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c @@ -1430,6 +1430,7 @@ static const struct qmp_phy_init_tbl sm8450_qmp_gen4x2_pcie_pcs_misc_tbl[] = { static const struct qmp_phy_init_tbl sm8450_qmp_gen4x2_pcie_rc_pcs_misc_tbl[] = { QMP_PHY_INIT_CFG(QPHY_V5_20_PCS_PCIE_ENDPOINT_REFCLK_DRIVE, 0xc1), QMP_PHY_INIT_CFG(QPHY_V5_20_PCS_PCIE_OSC_DTCT_ACTIONS, 0x00), + QMP_PHY_INIT_CFG(QPHY_V5_20_PCS_PCIE_PRESET_P10_POST, 0x00), }; static const struct qmp_phy_init_tbl sm8450_qmp_gen4x2_pcie_ep_serdes_tbl[] = { |