summaryrefslogtreecommitdiff
path: root/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
diff options
context:
space:
mode:
authorAbel Vesa <abel.vesa@linaro.org>2023-01-18 01:41:46 +0300
committerVinod Koul <vkoul@kernel.org>2023-02-02 16:03:20 +0300
commitc9736600a64f7d9b374838d065ef85f6bf6c3dd4 (patch)
tree8c9013ff28f73f6ece0114a000f260323f0d3a30 /drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
parentddf070f6c9cb8af8e9e4003c31947a3e0e3255d9 (diff)
downloadlinux-c9736600a64f7d9b374838d065ef85f6bf6c3dd4.tar.xz
phy: qcom-qmp: qserdes-txrx-ufs: Add v6 register offsets
The new SM8550 SoC bumps up the HW version of QMP phy to v6 for USB, UFS and PCIE g3x2. Add the new qserdes TX RX but UFS specific offsets in a dedicated header file. Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230117224148.1914627-5-abel.vesa@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'drivers/phy/qualcomm/phy-qcom-qmp-ufs.c')
-rw-r--r--drivers/phy/qualcomm/phy-qcom-qmp-ufs.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
index b66a7d1c2e99..12ce7138f8ef 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
@@ -27,6 +27,8 @@
#include "phy-qcom-qmp-pcs-ufs-v4.h"
#include "phy-qcom-qmp-pcs-ufs-v5.h"
+#include "phy-qcom-qmp-qserdes-txrx-ufs-v6.h"
+
/* QPHY_SW_RESET bit */
#define SW_RESET BIT(0)
/* QPHY_POWER_DOWN_CONTROL */