summaryrefslogtreecommitdiff
path: root/drivers/phy/rockchip/phy-rockchip-emmc.c
diff options
context:
space:
mode:
authorGreg Kroah-Hartman <gregkh@linuxfoundation.org>2019-04-25 11:49:34 +0300
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2019-04-25 11:49:34 +0300
commitd30e413fa482a0e83f958f488bfee31ad3431689 (patch)
tree0af9b6dde4483835ab9d67e9a4f9a15f87a8266d /drivers/phy/rockchip/phy-rockchip-emmc.c
parent1567d661b90ff670b61bf0b8461afd2dac4a4b7c (diff)
parent708310711e6cdc1f5d8fb1d3fb531fba09ebae2e (diff)
downloadlinux-d30e413fa482a0e83f958f488bfee31ad3431689.tar.xz
Merge tag 'phy-for-5.2' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy into usb-next
Kishon writes: phy: for 5.2 *) Add a new *release* phy_ops invoked when the consumer relinquishes PHY that can be used to undo the operation performed in xlate *) Add new driver to support USB2 PHY and shared USB3 + PCIE PHY in Amlogic G12A SoC Family. *) Add new driver to support for Broadcom's Stingray USB PHY (Type 1 has one super speed PHY and one high speed PHY, Type 2 has one high speed PHY) *) Add new driver to support USB PHY in hi3660 SoC of Hisilicon *) Add new driver to support UFS M-PHY in MediaTek SoC *) Add new driver to support XUSB pad controller in Tegra186 SoCs *) Add new driver to support SERDES in TI's AM654 platform *) Add support for generation 2 USB2 PHY and gneration 3 USB2 PHY in r8a77470 to phy-rcar-gen2.c and phy-rcar-gen3-usb2.c respectively *) Add support for PCIe QMP PHY support in msm8998 to phy-qcom-qmp.c *) Add support for SERDES6G in phy-ocelot-serdes.c *) Add support to set drive impedance from device tree in phy-rockchip-emmc.c *) Add support to power up/down the VBUS voltage rail in phy-fsl-imx8mq-usb.c *) Add support to shut off regulators that power UFS during system suspend *) Re-design phy-rcar-gen3-usb2.c to create separate PHY instances for each channel which helps to enable/disable interrupts for each instance independently *) Fix PCIe power up sequence to follow the TRM in order to ensure the DPLL & PHY operates correctly over the entire temperature range. *) Use devm_clk_get_optional to get optional clocks instead of adding custom error checks Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> * tag 'phy-for-5.2' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy: (51 commits) dt-bindings: phy-qcom-qmp: Tweak qcom,msm8998-qmp-ufs-phy dt-bindings: phy-qcom-qmp: Add qcom,msm8998-qmp-pcie-phy phy: Add usb phy support for hi3660 Soc of Hisilicon dt-bindings: phy: Add support for HiSilicon's hi3660 USB PHY scsi: phy: mediatek: fix typo in author's email address phy: ocelot-serdes: Add support for SERDES6G muxing phy: fsl-imx8mq-usb: add support for VBUS power control dt-bindings: phy-imx8mq-usb: add optional vbus supply regulator phy: qcom-qmp: Add msm8998 PCIe QMP PHY support phy: ti: am654-serdes: Support all clksel values phy: ti: Add a new SERDES driver for TI's AM654x SoC dt-bindings: phy: ti: Add dt binding documentation for SERDES in AM654x SoC phy: core: Invoke pm_runtime_get_*/pm_runtime_put_* before invoking reset callback phy: core: Add *release* phy_ops invoked when the consumer relinquishes PHY phy: phy-meson-gxl-usb2: get optional clock by devm_clk_get_optional() phy: socionext: get optional clock by devm_clk_get_optional() phy: qcom-qusb2: get optional clock by devm_clk_get_optional() phy: phy-mtk-tphy: get optional clock by devm_clk_get_optional() phy: renesas: rcar-gen3-usb2: enable/disable independent irqs phy: renesas: rcar-gen3-usb2: Use pdev's device pointer on dev_vdbg() ...
Diffstat (limited to 'drivers/phy/rockchip/phy-rockchip-emmc.c')
-rw-r--r--drivers/phy/rockchip/phy-rockchip-emmc.c30
1 files changed, 28 insertions, 2 deletions
diff --git a/drivers/phy/rockchip/phy-rockchip-emmc.c b/drivers/phy/rockchip/phy-rockchip-emmc.c
index 19bf84f0bc67..b804c6bf4b55 100644
--- a/drivers/phy/rockchip/phy-rockchip-emmc.c
+++ b/drivers/phy/rockchip/phy-rockchip-emmc.c
@@ -87,6 +87,7 @@ struct rockchip_emmc_phy {
unsigned int reg_offset;
struct regmap *reg_base;
struct clk *emmcclk;
+ unsigned int drive_impedance;
};
static int rockchip_emmc_phy_power(struct phy *phy, bool on_off)
@@ -281,10 +282,10 @@ static int rockchip_emmc_phy_power_on(struct phy *phy)
{
struct rockchip_emmc_phy *rk_phy = phy_get_drvdata(phy);
- /* Drive impedance: 50 Ohm */
+ /* Drive impedance: from DTS */
regmap_write(rk_phy->reg_base,
rk_phy->reg_offset + GRF_EMMCPHY_CON6,
- HIWORD_UPDATE(PHYCTRL_DR_50OHM,
+ HIWORD_UPDATE(rk_phy->drive_impedance,
PHYCTRL_DR_MASK,
PHYCTRL_DR_SHIFT));
@@ -314,6 +315,26 @@ static const struct phy_ops ops = {
.owner = THIS_MODULE,
};
+static u32 convert_drive_impedance_ohm(struct platform_device *pdev, u32 dr_ohm)
+{
+ switch (dr_ohm) {
+ case 100:
+ return PHYCTRL_DR_100OHM;
+ case 66:
+ return PHYCTRL_DR_66OHM;
+ case 50:
+ return PHYCTRL_DR_50OHM;
+ case 40:
+ return PHYCTRL_DR_40OHM;
+ case 33:
+ return PHYCTRL_DR_33OHM;
+ }
+
+ dev_warn(&pdev->dev, "Invalid value %u for drive-impedance-ohm.\n",
+ dr_ohm);
+ return PHYCTRL_DR_50OHM;
+}
+
static int rockchip_emmc_phy_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
@@ -322,6 +343,7 @@ static int rockchip_emmc_phy_probe(struct platform_device *pdev)
struct phy_provider *phy_provider;
struct regmap *grf;
unsigned int reg_offset;
+ u32 val;
if (!dev->parent || !dev->parent->of_node)
return -ENODEV;
@@ -344,6 +366,10 @@ static int rockchip_emmc_phy_probe(struct platform_device *pdev)
rk_phy->reg_offset = reg_offset;
rk_phy->reg_base = grf;
+ rk_phy->drive_impedance = PHYCTRL_DR_50OHM;
+
+ if (!of_property_read_u32(dev->of_node, "drive-impedance-ohm", &val))
+ rk_phy->drive_impedance = convert_drive_impedance_ohm(pdev, val);
generic_phy = devm_phy_create(dev, dev->of_node, &ops);
if (IS_ERR(generic_phy)) {