summaryrefslogtreecommitdiff
path: root/drivers/phy/socionext/phy-uniphier-pcie.c
diff options
context:
space:
mode:
authorKunihiko Hayashi <hayashi.kunihiko@socionext.com>2020-01-30 09:52:45 +0300
committerKishon Vijay Abraham I <kishon@ti.com>2020-03-20 17:04:29 +0300
commit6861781a807aae5fbabf95bd396e1c20f05cf4fb (patch)
tree8b78b695902dd80e3d24995d665a047ef89d8441 /drivers/phy/socionext/phy-uniphier-pcie.c
parent04de8fa202e6d5fbb07aecbb45daaeec8594664e (diff)
downloadlinux-6861781a807aae5fbabf95bd396e1c20f05cf4fb.tar.xz
phy: uniphier-pcie: Add SoC-dependent phy-mode function support
Since this phy is shared by multiple devices including USB and PCIe, it is necessary to determine which device use this phy. This patch adds SoC-dependent functions to determine a device using this phy. When there is 'socionext,syscon' property in the pcie-phy node, the driver calls SoC-dependt function instead of checking .has_syscon in SoC-dependent data. The function configures the system controller to use phy for PCIe. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Diffstat (limited to 'drivers/phy/socionext/phy-uniphier-pcie.c')
-rw-r--r--drivers/phy/socionext/phy-uniphier-pcie.c17
1 files changed, 10 insertions, 7 deletions
diff --git a/drivers/phy/socionext/phy-uniphier-pcie.c b/drivers/phy/socionext/phy-uniphier-pcie.c
index cd17c70145e1..e4adab375c73 100644
--- a/drivers/phy/socionext/phy-uniphier-pcie.c
+++ b/drivers/phy/socionext/phy-uniphier-pcie.c
@@ -55,8 +55,8 @@ struct uniphier_pciephy_priv {
};
struct uniphier_pciephy_soc_data {
- bool has_syscon;
bool is_legacy;
+ void (*set_phymode)(struct regmap *regmap);
};
static void uniphier_pciephy_testio_write(struct uniphier_pciephy_priv *priv,
@@ -243,9 +243,8 @@ static int uniphier_pciephy_probe(struct platform_device *pdev)
regmap = syscon_regmap_lookup_by_phandle(dev->of_node,
"socionext,syscon");
- if (!IS_ERR(regmap) && priv->data->has_syscon)
- regmap_update_bits(regmap, SG_USBPCIESEL,
- SG_USBPCIESEL_PCIE, SG_USBPCIESEL_PCIE);
+ if (!IS_ERR(regmap) && priv->data->set_phymode)
+ priv->data->set_phymode(regmap);
phy_set_drvdata(phy, priv);
phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
@@ -253,18 +252,22 @@ static int uniphier_pciephy_probe(struct platform_device *pdev)
return PTR_ERR_OR_ZERO(phy_provider);
}
+static void uniphier_pciephy_ld20_setmode(struct regmap *regmap)
+{
+ regmap_update_bits(regmap, SG_USBPCIESEL,
+ SG_USBPCIESEL_PCIE, SG_USBPCIESEL_PCIE);
+}
+
static const struct uniphier_pciephy_soc_data uniphier_pro5_data = {
- .has_syscon = false,
.is_legacy = true,
};
static const struct uniphier_pciephy_soc_data uniphier_ld20_data = {
- .has_syscon = true,
.is_legacy = false,
+ .set_phymode = uniphier_pciephy_ld20_setmode,
};
static const struct uniphier_pciephy_soc_data uniphier_pxs3_data = {
- .has_syscon = false,
.is_legacy = false,
};