diff options
| author | Johnny Huang <johnny_huang@aspeedtech.com> | 2019-12-02 09:14:32 +0300 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2019-12-13 11:41:01 +0300 |
| commit | 15711ba6ff197c3152c655dd9c55f5c1694e8272 (patch) | |
| tree | fe4edbd9e7f0ca140da78fe3260bd1c3f542b46e /drivers/pinctrl/aspeed/pinctrl-aspeed.h | |
| parent | 5f52c853847ffdc9654e5b685e1a1ae5bee83e65 (diff) | |
| download | linux-15711ba6ff197c3152c655dd9c55f5c1694e8272.tar.xz | |
pinctrl: aspeed-g6: Add AST2600 pinconf support
The AST2600 pinconf is a little different from previous generations of
ASPEED BMC SoCs in terms of architecture. The pull-down setting is
per-pin setting now, and drive-strength support 4 kind of value (e.g.
4ma, 8ma, 12ma, 16ma).
Signed-off-by: Johnny Huang <johnny_huang@aspeedtech.com>
[AJ: Trim unused pinctrl register macros]
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20191202061432.3996-8-andrew@aj.id.au
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/aspeed/pinctrl-aspeed.h')
| -rw-r--r-- | drivers/pinctrl/aspeed/pinctrl-aspeed.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed.h b/drivers/pinctrl/aspeed/pinctrl-aspeed.h index 6f0f03395617..4dcde3bc29c8 100644 --- a/drivers/pinctrl/aspeed/pinctrl-aspeed.h +++ b/drivers/pinctrl/aspeed/pinctrl-aspeed.h @@ -41,6 +41,13 @@ struct aspeed_pin_config { .mask = BIT_MASK(bit_) \ } +#define ASPEED_PULL_DOWN_PINCONF(pin_, reg_, bit_) \ + ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_DOWN, pin_, pin_, reg_, bit_), \ + ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, pin_, pin_, reg_, bit_) + +#define ASPEED_PULL_UP_PINCONF(pin_, reg_, bit_) \ + ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_PULL_UP, pin_, pin_, reg_, bit_), \ + ASPEED_SB_PINCONF(PIN_CONFIG_BIAS_DISABLE, pin_, pin_, reg_, bit_) /* * Aspeed pin configuration description. * |