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author | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2019-07-23 18:56:29 +0300 |
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committer | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2019-08-07 16:45:41 +0300 |
commit | b8d728687ee5c011ba6f3054553abdac21021ed3 (patch) | |
tree | 347a2c2cfb106bbbabb73c320b8a4c6516a2cfd1 /drivers/pinctrl/intel | |
parent | cd5acb2bce5bc12dd83b3738e47b01aee7693c14 (diff) | |
download | linux-b8d728687ee5c011ba6f3054553abdac21021ed3.tar.xz |
pinctrl: icelake: Provide Interrupt Status register offset
Since some of the GPIO controllers use different Interrupt Status offset,
it make sense to provide it explicitly in the driver.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Diffstat (limited to 'drivers/pinctrl/intel')
-rw-r--r-- | drivers/pinctrl/intel/pinctrl-icelake.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/pinctrl/intel/pinctrl-icelake.c b/drivers/pinctrl/intel/pinctrl-icelake.c index 5f2f5c61ad41..6489e9bbb61f 100644 --- a/drivers/pinctrl/intel/pinctrl-icelake.c +++ b/drivers/pinctrl/intel/pinctrl-icelake.c @@ -18,6 +18,7 @@ #define ICL_PAD_OWN 0x020 #define ICL_PADCFGLOCK 0x080 #define ICL_HOSTSW_OWN 0x0b0 +#define ICL_GPI_IS 0x100 #define ICL_GPI_IE 0x110 #define ICL_GPP(r, s, e, g) \ @@ -36,6 +37,7 @@ .padown_offset = ICL_PAD_OWN, \ .padcfglock_offset = ICL_PADCFGLOCK, \ .hostown_offset = ICL_HOSTSW_OWN, \ + .is_offset = ICL_GPI_IS, \ .ie_offset = ICL_GPI_IE, \ .pin_base = (s), \ .npins = ((e) - (s) + 1), \ |