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authorStefan Agner <stefan@agner.ch>2015-03-17 00:42:34 +0300
committerLinus Walleij <linus.walleij@linaro.org>2015-03-19 11:20:17 +0300
commite4c02dced975cbb3e7cb097a0895ce0143b3386a (patch)
tree2abd5fb32e51949422e5a7b39275c96c1f5413f3 /drivers/pinctrl/pinctrl-tegra.h
parent5757bfe51e53f8ae6e201310a830b207c5a64e02 (diff)
downloadlinux-e4c02dced975cbb3e7cb097a0895ce0143b3386a.tar.xz
pinctrl: tegra: use signed bitfields for optional fields
Optional fields are set to -1 by various preprocessor macros. Make sure the fields can actually store them. Signed-off-by: Stefan Agner <stefan@agner.ch> Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/pinctrl-tegra.h')
-rw-r--r--drivers/pinctrl/pinctrl-tegra.h40
1 files changed, 20 insertions, 20 deletions
diff --git a/drivers/pinctrl/pinctrl-tegra.h b/drivers/pinctrl/pinctrl-tegra.h
index d54ab9d38792..1615db7e3a4b 100644
--- a/drivers/pinctrl/pinctrl-tegra.h
+++ b/drivers/pinctrl/pinctrl-tegra.h
@@ -139,26 +139,26 @@ struct tegra_pingroup {
u32 pupd_bank:2;
u32 tri_bank:2;
u32 drv_bank:2;
- u32 mux_bit:6;
- u32 pupd_bit:6;
- u32 tri_bit:6;
- u32 einput_bit:6;
- u32 odrain_bit:6;
- u32 lock_bit:6;
- u32 ioreset_bit:6;
- u32 rcv_sel_bit:6;
- u32 hsm_bit:6;
- u32 schmitt_bit:6;
- u32 lpmd_bit:6;
- u32 drvdn_bit:6;
- u32 drvup_bit:6;
- u32 slwr_bit:6;
- u32 slwf_bit:6;
- u32 drvtype_bit:6;
- u32 drvdn_width:6;
- u32 drvup_width:6;
- u32 slwr_width:6;
- u32 slwf_width:6;
+ s32 mux_bit:6;
+ s32 pupd_bit:6;
+ s32 tri_bit:6;
+ s32 einput_bit:6;
+ s32 odrain_bit:6;
+ s32 lock_bit:6;
+ s32 ioreset_bit:6;
+ s32 rcv_sel_bit:6;
+ s32 hsm_bit:6;
+ s32 schmitt_bit:6;
+ s32 lpmd_bit:6;
+ s32 drvdn_bit:6;
+ s32 drvup_bit:6;
+ s32 slwr_bit:6;
+ s32 slwf_bit:6;
+ s32 drvtype_bit:6;
+ s32 drvdn_width:6;
+ s32 drvup_width:6;
+ s32 slwr_width:6;
+ s32 slwf_width:6;
};
/**