summaryrefslogtreecommitdiff
path: root/drivers/pinctrl/stm32
diff options
context:
space:
mode:
authorFabien Dessenne <fabien.dessenne@foss.st.com>2021-12-15 12:58:08 +0300
committerLinus Walleij <linus.walleij@linaro.org>2021-12-16 06:14:56 +0300
commitb67210cc217f9ca1c576909454d846970c13dfd4 (patch)
tree81e092e098ad1bcbe71ef3ec038ff3db38900839 /drivers/pinctrl/stm32
parent266423e60ea1b953fcc0cd97f3dad85857e434d1 (diff)
downloadlinux-b67210cc217f9ca1c576909454d846970c13dfd4.tar.xz
pinctrl: stm32: consider the GPIO offset to expose all the GPIO lines
Consider the GPIO controller offset (from "gpio-ranges") to compute the maximum GPIO line number. This fixes an issue where gpio-ranges uses a non-null offset. e.g.: gpio-ranges = <&pinctrl 6 86 10> In that case the last valid GPIO line is not 9 but 15 (6 + 10 - 1) Cc: stable@vger.kernel.org Fixes: 67e2996f72c7 ("pinctrl: stm32: fix the reported number of GPIO lines per bank") Reported-by: Christoph Fritz <chf.fritz@googlemail.com> Signed-off-by: Fabien Dessenne <fabien.dessenne@foss.st.com> Link: https://lore.kernel.org/r/20211215095808.621716-1-fabien.dessenne@foss.st.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/stm32')
-rw-r--r--drivers/pinctrl/stm32/pinctrl-stm32.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/pinctrl/stm32/pinctrl-stm32.c b/drivers/pinctrl/stm32/pinctrl-stm32.c
index 24764ebcc936..9ed764731570 100644
--- a/drivers/pinctrl/stm32/pinctrl-stm32.c
+++ b/drivers/pinctrl/stm32/pinctrl-stm32.c
@@ -1251,10 +1251,10 @@ static int stm32_gpiolib_register_bank(struct stm32_pinctrl *pctl,
bank_nr = args.args[1] / STM32_GPIO_PINS_PER_BANK;
bank->gpio_chip.base = args.args[1];
- npins = args.args[2];
- while (!of_parse_phandle_with_fixed_args(np, "gpio-ranges", 3,
- ++i, &args))
- npins += args.args[2];
+ /* get the last defined gpio line (offset + nb of pins) */
+ npins = args.args[0] + args.args[2];
+ while (!of_parse_phandle_with_fixed_args(np, "gpio-ranges", 3, ++i, &args))
+ npins = max(npins, (int)(args.args[0] + args.args[2]));
} else {
bank_nr = pctl->nbanks;
bank->gpio_chip.base = bank_nr * STM32_GPIO_PINS_PER_BANK;