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authorDoug Anderson <dianders@chromium.org>2014-10-21 21:47:32 +0400
committerHeiko Stuebner <heiko@sntech.de>2014-10-29 23:06:15 +0300
commit876d716ba9af205f46b7e911d39482e627aea0e8 (patch)
treef60e54b2ae4b65e6f7ce69a5c369ffbedb53aa6e /drivers/pinctrl
parentf114040e3ea6e07372334ade75d1ee0775c355e1 (diff)
downloadlinux-876d716ba9af205f46b7e911d39482e627aea0e8.tar.xz
pinctrl: rockchip: Set wake_enabled
The rockchip pinctrl driver uses irq_gc_set_wake() but doesn't setup the .wake_enabled member. That means that we can never actually use a pin for wakeup. When "irq_set_irq_wake()" tries to call through it will always get a failure from set_irq_wake_real() and will then set wake_depth to 0. Assuming you can resume you'll later get an error message about "Unbalanced IRQ x wake disable". Signed-off-by: Doug Anderson <dianders@chromium.org> Tested-by: Chris Zhong <zyw@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'drivers/pinctrl')
-rw-r--r--drivers/pinctrl/pinctrl-rockchip.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index 016f4578e494..230d8f379129 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -1563,6 +1563,7 @@ static int rockchip_interrupts_register(struct platform_device *pdev,
gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit;
gc->chip_types[0].chip.irq_set_wake = irq_gc_set_wake;
gc->chip_types[0].chip.irq_set_type = rockchip_irq_set_type;
+ gc->wake_enabled = IRQ_MSK(bank->nr_pins);
irq_set_handler_data(bank->irq, bank);
irq_set_chained_handler(bank->irq, rockchip_irq_demux);