diff options
author | David E. Box <david.e.box@linux.intel.com> | 2024-02-27 22:01:34 +0300 |
---|---|---|
committer | Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> | 2024-03-12 13:47:53 +0300 |
commit | ac2d1fd9688fcdfba5acc815fb2b13fec83e5dad (patch) | |
tree | 46909e530aed52b89fc101fa12b3f8631add0ec1 /drivers/platform/x86/intel | |
parent | e6ba4acde44957dc9bdc3222b5739217a102752d (diff) | |
download | linux-ac2d1fd9688fcdfba5acc815fb2b13fec83e5dad.tar.xz |
platform/x86/intel/pmc/arl: Put GNA device in D3
As is the case on Meteor Lake, the Gaussian & Neural Accelerator (GNA)
device is powered by BIOS to D0 by default. If no driver is loaded, this
will cause the Package C state to be limited to PC2, leading to
significant power consumption and decrease in batter life. Put the GNA
device in D3 by default if no driver is loaded for it.
Fixes: 83f168a1a437 ("platform/x86/intel/pmc: Add Arrow Lake S support to intel_pmc_core driver")
Signed-off-by: "David E. Box" <david.e.box@linux.intel.com>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Link: https://lore.kernel.org/r/20240227190134.1592072-3-david.e.box@linux.intel.com
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Diffstat (limited to 'drivers/platform/x86/intel')
-rw-r--r-- | drivers/platform/x86/intel/pmc/arl.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/platform/x86/intel/pmc/arl.c b/drivers/platform/x86/intel/pmc/arl.c index 683ae828276b..34b4cd23bfe5 100644 --- a/drivers/platform/x86/intel/pmc/arl.c +++ b/drivers/platform/x86/intel/pmc/arl.c @@ -673,6 +673,7 @@ static struct pmc_info arl_pmc_info_list[] = { }; #define ARL_NPU_PCI_DEV 0xad1d +#define ARL_GNA_PCI_DEV 0xae4c /* * Set power state of select devices that do not have drivers to D3 * so that they do not block Package C entry. @@ -680,6 +681,7 @@ static struct pmc_info arl_pmc_info_list[] = { static void arl_d3_fixup(void) { pmc_core_set_device_d3(ARL_NPU_PCI_DEV); + pmc_core_set_device_d3(ARL_GNA_PCI_DEV); } static int arl_resume(struct pmc_dev *pmcdev) |