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authorEd Wildgoose <lists@wildgooses.com>2020-09-20 23:32:06 +0300
committerAndy Shevchenko <andriy.shevchenko@linux.intel.com>2020-09-24 14:04:53 +0300
commitfce55cc8b7ade3c583f47eab5885e2f541ede1ee (patch)
treedc14743a48d418179b5b0b8b5ff1b216b23659ef /drivers/platform
parentafdd1ebb72051e8b6b83c4d7dc542a9be0e1352d (diff)
downloadlinux-fce55cc8b7ade3c583f47eab5885e2f541ede1ee.tar.xz
platform/x86: pcengines-apuv2: Fix typo on define of AMD_FCH_GPIO_REG_GPIO55_DEVSLP0
Schematics show that the GPIO number is 55 (not 59). Trivial typo. Signed-off-by: Ed Wildgoose <lists@wildgooses.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Diffstat (limited to 'drivers/platform')
-rw-r--r--drivers/platform/x86/pcengines-apuv2.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/platform/x86/pcengines-apuv2.c b/drivers/platform/x86/pcengines-apuv2.c
index 6aff6cf41414..c37349f97bb8 100644
--- a/drivers/platform/x86/pcengines-apuv2.c
+++ b/drivers/platform/x86/pcengines-apuv2.c
@@ -32,7 +32,7 @@
#define APU2_GPIO_REG_LED3 AMD_FCH_GPIO_REG_GPIO59_DEVSLP1
#define APU2_GPIO_REG_MODESW AMD_FCH_GPIO_REG_GPIO32_GE1
#define APU2_GPIO_REG_SIMSWAP AMD_FCH_GPIO_REG_GPIO33_GE2
-#define APU2_GPIO_REG_MPCIE2 AMD_FCH_GPIO_REG_GPIO59_DEVSLP0
+#define APU2_GPIO_REG_MPCIE2 AMD_FCH_GPIO_REG_GPIO55_DEVSLP0
#define APU2_GPIO_REG_MPCIE3 AMD_FCH_GPIO_REG_GPIO51
/* Order in which the GPIO lines are defined in the register list */