diff options
| author | Shyam Sundar S K <Shyam-sundar.S-k@amd.com> | 2023-04-12 14:15:00 +0300 |
|---|---|---|
| committer | Hans de Goede <hdegoede@redhat.com> | 2023-04-17 12:33:39 +0300 |
| commit | efebfa80ce24cba9e7af786e9dec911cf9e7b35d (patch) | |
| tree | 04a34a9b8898ef5588bdb17c34199d0aac509108 /drivers/platform | |
| parent | f6e7ac4c35a28aef0be93b32c533ae678ad0b9e7 (diff) | |
| download | linux-efebfa80ce24cba9e7af786e9dec911cf9e7b35d.tar.xz | |
platform/x86: amd: pmc: provide user message where s0ix is not supported
Some platforms do not support hardware backed s0i3 transitions. When such
CPUs are detected, provide a warning message to the user.
Suggested-by: Sanket Goswami <Sanket.Goswami@amd.com>
Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
Link: https://lore.kernel.org/r/20230412111500.2602529-1-Shyam-sundar.S-k@amd.com
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Diffstat (limited to 'drivers/platform')
| -rw-r--r-- | drivers/platform/x86/amd/pmc.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/platform/x86/amd/pmc.c b/drivers/platform/x86/amd/pmc.c index 14d3ff425300..5a935db80fab 100644 --- a/drivers/platform/x86/amd/pmc.c +++ b/drivers/platform/x86/amd/pmc.c @@ -94,6 +94,7 @@ #define AMD_CPU_ID_YC 0x14B5 #define AMD_CPU_ID_CB 0x14D8 #define AMD_CPU_ID_PS 0x14E8 +#define AMD_CPU_ID_SP 0x14A4 #define PMC_MSG_DELAY_MIN_US 50 #define RESPONSE_REGISTER_LOOP_MAX 20000 @@ -886,6 +887,7 @@ static const struct pci_device_id pmc_pci_ids[] = { { PCI_DEVICE(PCI_VENDOR_ID_AMD, AMD_CPU_ID_RN) }, { PCI_DEVICE(PCI_VENDOR_ID_AMD, AMD_CPU_ID_PCO) }, { PCI_DEVICE(PCI_VENDOR_ID_AMD, AMD_CPU_ID_RV) }, + { PCI_DEVICE(PCI_VENDOR_ID_AMD, AMD_CPU_ID_SP) }, { } }; @@ -964,6 +966,13 @@ static int amd_pmc_probe(struct platform_device *pdev) } dev->cpu_id = rdev->device; + + if (dev->cpu_id == AMD_CPU_ID_SP) { + dev_warn_once(dev->dev, "S0i3 is not supported on this hardware\n"); + err = -ENODEV; + goto err_pci_dev_put; + } + dev->rdev = rdev; err = amd_smn_read(0, AMD_PMC_BASE_ADDR_LO, &val); if (err) { |