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authorTejun Heo <htejun@gmail.com>2006-02-10 11:25:47 +0300
committerJeff Garzik <jgarzik@pobox.com>2006-02-10 15:04:31 +0300
commitcc9278ed5e992122a654a3f762561ee5e013810f (patch)
tree9a089a52a4afefd09fcc49cd9490acee2aa1289a /drivers/scsi/ahci.c
parentf63790201521ccadb63673ff121dac46ab300cf0 (diff)
downloadlinux-cc9278ed5e992122a654a3f762561ee5e013810f.tar.xz
[PATCH] ahci: separate out ahci_fill_cmd_slot()
Separate out ahci_fill_cmd_slot() from ahci_qc_prep(). ahci_fill_cmd_slot() can later be used to issue non-standard commands. (e.g. softreset) Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
Diffstat (limited to 'drivers/scsi/ahci.c')
-rw-r--r--drivers/scsi/ahci.c44
1 files changed, 23 insertions, 21 deletions
diff --git a/drivers/scsi/ahci.c b/drivers/scsi/ahci.c
index fa01894fc41b..98ce6bb62ff8 100644
--- a/drivers/scsi/ahci.c
+++ b/drivers/scsi/ahci.c
@@ -507,6 +507,15 @@ static unsigned int ahci_dev_classify(struct ata_port *ap)
return ata_dev_classify(&tf);
}
+static void ahci_fill_cmd_slot(struct ata_port *ap, u32 opts)
+{
+ struct ahci_port_priv *pp = ap->private_data;
+ pp->cmd_slot[0].opts = cpu_to_le32(opts);
+ pp->cmd_slot[0].status = 0;
+ pp->cmd_slot[0].tbl_addr = cpu_to_le32(pp->cmd_tbl_dma & 0xffffffff);
+ pp->cmd_slot[0].tbl_addr_hi = cpu_to_le32((pp->cmd_tbl_dma >> 16) >> 16);
+}
+
static void ahci_phy_reset(struct ata_port *ap)
{
void __iomem *port_mmio = (void __iomem *) ap->ioaddr.cmd_addr;
@@ -585,42 +594,35 @@ static void ahci_qc_prep(struct ata_queued_cmd *qc)
{
struct ata_port *ap = qc->ap;
struct ahci_port_priv *pp = ap->private_data;
+ int is_atapi = is_atapi_taskfile(&qc->tf);
u32 opts;
const u32 cmd_fis_len = 5; /* five dwords */
unsigned int n_elem;
/*
- * Fill in command slot information (currently only one slot,
- * slot 0, is currently since we don't do queueing)
- */
-
- opts = cmd_fis_len;
- if (qc->tf.flags & ATA_TFLAG_WRITE)
- opts |= AHCI_CMD_WRITE;
- if (is_atapi_taskfile(&qc->tf))
- opts |= AHCI_CMD_ATAPI;
-
- pp->cmd_slot[0].opts = cpu_to_le32(opts);
- pp->cmd_slot[0].status = 0;
- pp->cmd_slot[0].tbl_addr = cpu_to_le32(pp->cmd_tbl_dma & 0xffffffff);
- pp->cmd_slot[0].tbl_addr_hi = cpu_to_le32((pp->cmd_tbl_dma >> 16) >> 16);
-
- /*
* Fill in command table information. First, the header,
* a SATA Register - Host to Device command FIS.
*/
ata_tf_to_fis(&qc->tf, pp->cmd_tbl, 0);
- if (opts & AHCI_CMD_ATAPI) {
+ if (is_atapi) {
memset(pp->cmd_tbl + AHCI_CMD_TBL_CDB, 0, 32);
memcpy(pp->cmd_tbl + AHCI_CMD_TBL_CDB, qc->cdb, ap->cdb_len);
}
- if (!(qc->flags & ATA_QCFLAG_DMAMAP))
- return;
+ n_elem = 0;
+ if (qc->flags & ATA_QCFLAG_DMAMAP)
+ n_elem = ahci_fill_sg(qc);
- n_elem = ahci_fill_sg(qc);
+ /*
+ * Fill in command slot information.
+ */
+ opts = cmd_fis_len | n_elem << 16;
+ if (qc->tf.flags & ATA_TFLAG_WRITE)
+ opts |= AHCI_CMD_WRITE;
+ if (is_atapi)
+ opts |= AHCI_CMD_ATAPI;
- pp->cmd_slot[0].opts |= cpu_to_le32(n_elem << 16);
+ ahci_fill_cmd_slot(ap, opts);
}
static void ahci_restart_port(struct ata_port *ap, u32 irq_stat)