soc: amlogic: Move power-domain drivers to the genpd dir

To simplify with maintenance let's move the amlogic power-domain drivers to
the new genpd directory. Going forward, patches are intended to be managed
through a separate git tree, according to MAINTAINERS.

Cc: Neil Armstrong <neil.armstrong@linaro.org>
Cc: Kevin Hilman <khilman@baylibre.com>
Cc: Jerome Brunet <jbrunet@baylibre.com>
Cc: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Cc: <linux-amlogic@lists.infradead.org>
Acked-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>

4 files changed, 0 insertions, 1250 deletions

diff --git a/drivers/soc/amlogic/Makefile b/drivers/soc/amlogic/Makefile
index 7b8c5d323f5c..c25f835e6a26 100644
--- a/drivers/soc/amlogic/Makefile
+++ b/drivers/soc/amlogic/Makefile
@@ -2,7 +2,4 @@
 obj-$(CONFIG_MESON_CANVAS) += meson-canvas.o
 obj-$(CONFIG_MESON_CLK_MEASURE) += meson-clk-measure.o
 obj-$(CONFIG_MESON_GX_SOCINFO) += meson-gx-socinfo.o
-obj-$(CONFIG_MESON_GX_PM_DOMAINS) += meson-gx-pwrc-vpu.o
 obj-$(CONFIG_MESON_MX_SOCINFO) += meson-mx-socinfo.o
-obj-$(CONFIG_MESON_EE_PM_DOMAINS) += meson-ee-pwrc.o
-obj-$(CONFIG_MESON_SECURE_PM_DOMAINS) += meson-secure-pwrc.o
diff --git a/drivers/soc/amlogic/meson-ee-pwrc.c b/drivers/soc/amlogic/meson-ee-pwrc.c
deleted file mode 100644
index f54acffc83f9..000000000000
--- a/drivers/soc/amlogic/meson-ee-pwrc.c
+++ /dev/null
@@ -1,636 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (c) 2019 BayLibre, SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- */
-
-#include <linux/of_address.h>
-#include <linux/platform_device.h>
-#include <linux/pm_domain.h>
-#include <linux/bitfield.h>
-#include <linux/regmap.h>
-#include <linux/mfd/syscon.h>
-#include <linux/of_device.h>
-#include <linux/reset-controller.h>
-#include <linux/reset.h>
-#include <linux/clk.h>
-#include <linux/module.h>
-#include <dt-bindings/power/meson8-power.h>
-#include <dt-bindings/power/meson-axg-power.h>
-#include <dt-bindings/power/meson-g12a-power.h>
-#include <dt-bindings/power/meson-gxbb-power.h>
-#include <dt-bindings/power/meson-sm1-power.h>
-
-/* AO Offsets */
-
-#define GX_AO_RTI_GEN_PWR_SLEEP0	(0x3a << 2)
-#define GX_AO_RTI_GEN_PWR_ISO0		(0x3b << 2)
-
-/*
- * Meson8/Meson8b/Meson8m2 only expose the power management registers of the
- * AO-bus as syscon. 0x3a from GX translates to 0x02, 0x3b translates to 0x03
- * and so on.
- */
-#define MESON8_AO_RTI_GEN_PWR_SLEEP0	(0x02 << 2)
-#define MESON8_AO_RTI_GEN_PWR_ISO0	(0x03 << 2)
-
-/* HHI Offsets */
-
-#define HHI_MEM_PD_REG0			(0x40 << 2)
-#define HHI_VPU_MEM_PD_REG0		(0x41 << 2)
-#define HHI_VPU_MEM_PD_REG1		(0x42 << 2)
-#define HHI_VPU_MEM_PD_REG3		(0x43 << 2)
-#define HHI_VPU_MEM_PD_REG4		(0x44 << 2)
-#define HHI_AUDIO_MEM_PD_REG0		(0x45 << 2)
-#define HHI_NANOQ_MEM_PD_REG0		(0x46 << 2)
-#define HHI_NANOQ_MEM_PD_REG1		(0x47 << 2)
-#define HHI_VPU_MEM_PD_REG2		(0x4d << 2)
-
-#define G12A_HHI_NANOQ_MEM_PD_REG0	(0x43 << 2)
-#define G12A_HHI_NANOQ_MEM_PD_REG1	(0x44 << 2)
-
-struct meson_ee_pwrc;
-struct meson_ee_pwrc_domain;
-
-struct meson_ee_pwrc_mem_domain {
-	unsigned int reg;
-	unsigned int mask;
-};
-
-struct meson_ee_pwrc_top_domain {
-	unsigned int sleep_reg;
-	unsigned int sleep_mask;
-	unsigned int iso_reg;
-	unsigned int iso_mask;
-};
-
-struct meson_ee_pwrc_domain_desc {
-	char *name;
-	unsigned int reset_names_count;
-	unsigned int clk_names_count;
-	struct meson_ee_pwrc_top_domain *top_pd;
-	unsigned int mem_pd_count;
-	struct meson_ee_pwrc_mem_domain *mem_pd;
-	bool (*is_powered_off)(struct meson_ee_pwrc_domain *pwrc_domain);
-};
-
-struct meson_ee_pwrc_domain_data {
-	unsigned int count;
-	struct meson_ee_pwrc_domain_desc *domains;
-};
-
-/* TOP Power Domains */
-
-static struct meson_ee_pwrc_top_domain gx_pwrc_vpu = {
-	.sleep_reg = GX_AO_RTI_GEN_PWR_SLEEP0,
-	.sleep_mask = BIT(8),
-	.iso_reg = GX_AO_RTI_GEN_PWR_SLEEP0,
-	.iso_mask = BIT(9),
-};
-
-static struct meson_ee_pwrc_top_domain meson8_pwrc_vpu = {
-	.sleep_reg = MESON8_AO_RTI_GEN_PWR_SLEEP0,
-	.sleep_mask = BIT(8),
-	.iso_reg = MESON8_AO_RTI_GEN_PWR_SLEEP0,
-	.iso_mask = BIT(9),
-};
-
-#define SM1_EE_PD(__bit)					\
-	{							\
-		.sleep_reg = GX_AO_RTI_GEN_PWR_SLEEP0, 		\
-		.sleep_mask = BIT(__bit), 			\
-		.iso_reg = GX_AO_RTI_GEN_PWR_ISO0, 		\
-		.iso_mask = BIT(__bit), 			\
-	}
-
-static struct meson_ee_pwrc_top_domain sm1_pwrc_vpu = SM1_EE_PD(8);
-static struct meson_ee_pwrc_top_domain sm1_pwrc_nna = SM1_EE_PD(16);
-static struct meson_ee_pwrc_top_domain sm1_pwrc_usb = SM1_EE_PD(17);
-static struct meson_ee_pwrc_top_domain sm1_pwrc_pci = SM1_EE_PD(18);
-static struct meson_ee_pwrc_top_domain sm1_pwrc_ge2d = SM1_EE_PD(19);
-
-static struct meson_ee_pwrc_top_domain g12a_pwrc_nna = {
-	.sleep_reg = GX_AO_RTI_GEN_PWR_SLEEP0,
-	.sleep_mask = BIT(16) | BIT(17),
-	.iso_reg = GX_AO_RTI_GEN_PWR_ISO0,
-	.iso_mask = BIT(16) | BIT(17),
-};
-
-/* Memory PD Domains */
-
-#define VPU_MEMPD(__reg)					\
-	{ __reg, GENMASK(1, 0) },				\
-	{ __reg, GENMASK(3, 2) },				\
-	{ __reg, GENMASK(5, 4) },				\
-	{ __reg, GENMASK(7, 6) },				\
-	{ __reg, GENMASK(9, 8) },				\
-	{ __reg, GENMASK(11, 10) },				\
-	{ __reg, GENMASK(13, 12) },				\
-	{ __reg, GENMASK(15, 14) },				\
-	{ __reg, GENMASK(17, 16) },				\
-	{ __reg, GENMASK(19, 18) },				\
-	{ __reg, GENMASK(21, 20) },				\
-	{ __reg, GENMASK(23, 22) },				\
-	{ __reg, GENMASK(25, 24) },				\
-	{ __reg, GENMASK(27, 26) },				\
-	{ __reg, GENMASK(29, 28) },				\
-	{ __reg, GENMASK(31, 30) }
-
-#define VPU_HHI_MEMPD(__reg)					\
-	{ __reg, BIT(8) },					\
-	{ __reg, BIT(9) },					\
-	{ __reg, BIT(10) },					\
-	{ __reg, BIT(11) },					\
-	{ __reg, BIT(12) },					\
-	{ __reg, BIT(13) },					\
-	{ __reg, BIT(14) },					\
-	{ __reg, BIT(15) }
-
-static struct meson_ee_pwrc_mem_domain axg_pwrc_mem_vpu[] = {
-	VPU_MEMPD(HHI_VPU_MEM_PD_REG0),
-	VPU_HHI_MEMPD(HHI_MEM_PD_REG0),
-};
-
-static struct meson_ee_pwrc_mem_domain g12a_pwrc_mem_vpu[] = {
-	VPU_MEMPD(HHI_VPU_MEM_PD_REG0),
-	VPU_MEMPD(HHI_VPU_MEM_PD_REG1),
-	VPU_MEMPD(HHI_VPU_MEM_PD_REG2),
-	VPU_HHI_MEMPD(HHI_MEM_PD_REG0),
-};
-
-static struct meson_ee_pwrc_mem_domain gxbb_pwrc_mem_vpu[] = {
-	VPU_MEMPD(HHI_VPU_MEM_PD_REG0),
-	VPU_MEMPD(HHI_VPU_MEM_PD_REG1),
-	VPU_HHI_MEMPD(HHI_MEM_PD_REG0),
-};
-
-static struct meson_ee_pwrc_mem_domain meson_pwrc_mem_eth[] = {
-	{ HHI_MEM_PD_REG0, GENMASK(3, 2) },
-};
-
-static struct meson_ee_pwrc_mem_domain meson8_pwrc_audio_dsp_mem[] = {
-	{ HHI_MEM_PD_REG0, GENMASK(1, 0) },
-};
-
-static struct meson_ee_pwrc_mem_domain meson8_pwrc_mem_vpu[] = {
-	VPU_MEMPD(HHI_VPU_MEM_PD_REG0),
-	VPU_MEMPD(HHI_VPU_MEM_PD_REG1),
-	VPU_HHI_MEMPD(HHI_MEM_PD_REG0),
-};
-
-static struct meson_ee_pwrc_mem_domain sm1_pwrc_mem_vpu[] = {
-	VPU_MEMPD(HHI_VPU_MEM_PD_REG0),
-	VPU_MEMPD(HHI_VPU_MEM_PD_REG1),
-	VPU_MEMPD(HHI_VPU_MEM_PD_REG2),
-	VPU_MEMPD(HHI_VPU_MEM_PD_REG3),
-	{ HHI_VPU_MEM_PD_REG4, GENMASK(1, 0) },
-	{ HHI_VPU_MEM_PD_REG4, GENMASK(3, 2) },
-	{ HHI_VPU_MEM_PD_REG4, GENMASK(5, 4) },
-	{ HHI_VPU_MEM_PD_REG4, GENMASK(7, 6) },
-	VPU_HHI_MEMPD(HHI_MEM_PD_REG0),
-};
-
-static struct meson_ee_pwrc_mem_domain sm1_pwrc_mem_nna[] = {
-	{ HHI_NANOQ_MEM_PD_REG0, 0xff },
-	{ HHI_NANOQ_MEM_PD_REG1, 0xff },
-};
-
-static struct meson_ee_pwrc_mem_domain sm1_pwrc_mem_usb[] = {
-	{ HHI_MEM_PD_REG0, GENMASK(31, 30) },
-};
-
-static struct meson_ee_pwrc_mem_domain sm1_pwrc_mem_pcie[] = {
-	{ HHI_MEM_PD_REG0, GENMASK(29, 26) },
-};
-
-static struct meson_ee_pwrc_mem_domain sm1_pwrc_mem_ge2d[] = {
-	{ HHI_MEM_PD_REG0, GENMASK(25, 18) },
-};
-
-static struct meson_ee_pwrc_mem_domain axg_pwrc_mem_audio[] = {
-	{ HHI_MEM_PD_REG0, GENMASK(5, 4) },
-};
-
-static struct meson_ee_pwrc_mem_domain sm1_pwrc_mem_audio[] = {
-	{ HHI_MEM_PD_REG0, GENMASK(5, 4) },
-	{ HHI_AUDIO_MEM_PD_REG0, GENMASK(1, 0) },
-	{ HHI_AUDIO_MEM_PD_REG0, GENMASK(3, 2) },
-	{ HHI_AUDIO_MEM_PD_REG0, GENMASK(5, 4) },
-	{ HHI_AUDIO_MEM_PD_REG0, GENMASK(7, 6) },
-	{ HHI_AUDIO_MEM_PD_REG0, GENMASK(13, 12) },
-	{ HHI_AUDIO_MEM_PD_REG0, GENMASK(15, 14) },
-	{ HHI_AUDIO_MEM_PD_REG0, GENMASK(17, 16) },
-	{ HHI_AUDIO_MEM_PD_REG0, GENMASK(19, 18) },
-	{ HHI_AUDIO_MEM_PD_REG0, GENMASK(21, 20) },
-	{ HHI_AUDIO_MEM_PD_REG0, GENMASK(23, 22) },
-	{ HHI_AUDIO_MEM_PD_REG0, GENMASK(25, 24) },
-	{ HHI_AUDIO_MEM_PD_REG0, GENMASK(27, 26) },
-};
-
-static struct meson_ee_pwrc_mem_domain g12a_pwrc_mem_nna[] = {
-	{ G12A_HHI_NANOQ_MEM_PD_REG0, GENMASK(31, 0) },
-	{ G12A_HHI_NANOQ_MEM_PD_REG1, GENMASK(23, 0) },
-};
-
-#define VPU_PD(__name, __top_pd, __mem, __is_pwr_off, __resets, __clks)	\
-	{								\
-		.name = __name,						\
-		.reset_names_count = __resets,				\
-		.clk_names_count = __clks,				\
-		.top_pd = __top_pd,					\
-		.mem_pd_count = ARRAY_SIZE(__mem),			\
-		.mem_pd = __mem,					\
-		.is_powered_off = __is_pwr_off,				\
-	}
-
-#define TOP_PD(__name, __top_pd, __mem, __is_pwr_off)			\
-	{								\
-		.name = __name,						\
-		.top_pd = __top_pd,					\
-		.mem_pd_count = ARRAY_SIZE(__mem),			\
-		.mem_pd = __mem,					\
-		.is_powered_off = __is_pwr_off,				\
-	}
-
-#define MEM_PD(__name, __mem)						\
-	TOP_PD(__name, NULL, __mem, NULL)
-
-static bool pwrc_ee_is_powered_off(struct meson_ee_pwrc_domain *pwrc_domain);
-
-static struct meson_ee_pwrc_domain_desc axg_pwrc_domains[] = {
-	[PWRC_AXG_VPU_ID]  = VPU_PD("VPU", &gx_pwrc_vpu, axg_pwrc_mem_vpu,
-				     pwrc_ee_is_powered_off, 5, 2),
-	[PWRC_AXG_ETHERNET_MEM_ID] = MEM_PD("ETH", meson_pwrc_mem_eth),
-	[PWRC_AXG_AUDIO_ID] = MEM_PD("AUDIO", axg_pwrc_mem_audio),
-};
-
-static struct meson_ee_pwrc_domain_desc g12a_pwrc_domains[] = {
-	[PWRC_G12A_VPU_ID]  = VPU_PD("VPU", &gx_pwrc_vpu, g12a_pwrc_mem_vpu,
-				     pwrc_ee_is_powered_off, 11, 2),
-	[PWRC_G12A_ETH_ID] = MEM_PD("ETH", meson_pwrc_mem_eth),
-	[PWRC_G12A_NNA_ID] = TOP_PD("NNA", &g12a_pwrc_nna, g12a_pwrc_mem_nna,
-				    pwrc_ee_is_powered_off),
-};
-
-static struct meson_ee_pwrc_domain_desc gxbb_pwrc_domains[] = {
-	[PWRC_GXBB_VPU_ID]  = VPU_PD("VPU", &gx_pwrc_vpu, gxbb_pwrc_mem_vpu,
-				     pwrc_ee_is_powered_off, 12, 2),
-	[PWRC_GXBB_ETHERNET_MEM_ID] = MEM_PD("ETH", meson_pwrc_mem_eth),
-};
-
-static struct meson_ee_pwrc_domain_desc meson8_pwrc_domains[] = {
-	[PWRC_MESON8_VPU_ID]  = VPU_PD("VPU", &meson8_pwrc_vpu,
-				       meson8_pwrc_mem_vpu,
-				       pwrc_ee_is_powered_off, 0, 1),
-	[PWRC_MESON8_ETHERNET_MEM_ID] = MEM_PD("ETHERNET_MEM",
-					       meson_pwrc_mem_eth),
-	[PWRC_MESON8_AUDIO_DSP_MEM_ID] = MEM_PD("AUDIO_DSP_MEM",
-						meson8_pwrc_audio_dsp_mem),
-};
-
-static struct meson_ee_pwrc_domain_desc meson8b_pwrc_domains[] = {
-	[PWRC_MESON8_VPU_ID]  = VPU_PD("VPU", &meson8_pwrc_vpu,
-				       meson8_pwrc_mem_vpu,
-				       pwrc_ee_is_powered_off, 11, 1),
-	[PWRC_MESON8_ETHERNET_MEM_ID] = MEM_PD("ETHERNET_MEM",
-					       meson_pwrc_mem_eth),
-	[PWRC_MESON8_AUDIO_DSP_MEM_ID] = MEM_PD("AUDIO_DSP_MEM",
-						meson8_pwrc_audio_dsp_mem),
-};
-
-static struct meson_ee_pwrc_domain_desc sm1_pwrc_domains[] = {
-	[PWRC_SM1_VPU_ID]  = VPU_PD("VPU", &sm1_pwrc_vpu, sm1_pwrc_mem_vpu,
-				    pwrc_ee_is_powered_off, 11, 2),
-	[PWRC_SM1_NNA_ID]  = TOP_PD("NNA", &sm1_pwrc_nna, sm1_pwrc_mem_nna,
-				    pwrc_ee_is_powered_off),
-	[PWRC_SM1_USB_ID]  = TOP_PD("USB", &sm1_pwrc_usb, sm1_pwrc_mem_usb,
-				    pwrc_ee_is_powered_off),
-	[PWRC_SM1_PCIE_ID] = TOP_PD("PCI", &sm1_pwrc_pci, sm1_pwrc_mem_pcie,
-				    pwrc_ee_is_powered_off),
-	[PWRC_SM1_GE2D_ID] = TOP_PD("GE2D", &sm1_pwrc_ge2d, sm1_pwrc_mem_ge2d,
-				    pwrc_ee_is_powered_off),
-	[PWRC_SM1_AUDIO_ID] = MEM_PD("AUDIO", sm1_pwrc_mem_audio),
-	[PWRC_SM1_ETH_ID] = MEM_PD("ETH", meson_pwrc_mem_eth),
-};
-
-struct meson_ee_pwrc_domain {
-	struct generic_pm_domain base;
-	bool enabled;
-	struct meson_ee_pwrc *pwrc;
-	struct meson_ee_pwrc_domain_desc desc;
-	struct clk_bulk_data *clks;
-	int num_clks;
-	struct reset_control *rstc;
-	int num_rstc;
-};
-
-struct meson_ee_pwrc {
-	struct regmap *regmap_ao;
-	struct regmap *regmap_hhi;
-	struct meson_ee_pwrc_domain *domains;
-	struct genpd_onecell_data xlate;
-};
-
-static bool pwrc_ee_is_powered_off(struct meson_ee_pwrc_domain *pwrc_domain)
-{
-	u32 reg;
-
-	regmap_read(pwrc_domain->pwrc->regmap_ao,
-		    pwrc_domain->desc.top_pd->sleep_reg, &reg);
-
-	return (reg & pwrc_domain->desc.top_pd->sleep_mask);
-}
-
-static int meson_ee_pwrc_off(struct generic_pm_domain *domain)
-{
-	struct meson_ee_pwrc_domain *pwrc_domain =
-		container_of(domain, struct meson_ee_pwrc_domain, base);
-	int i;
-
-	if (pwrc_domain->desc.top_pd)
-		regmap_update_bits(pwrc_domain->pwrc->regmap_ao,
-				   pwrc_domain->desc.top_pd->sleep_reg,
-				   pwrc_domain->desc.top_pd->sleep_mask,
-				   pwrc_domain->desc.top_pd->sleep_mask);
-	udelay(20);
-
-	for (i = 0 ; i < pwrc_domain->desc.mem_pd_count ; ++i)
-		regmap_update_bits(pwrc_domain->pwrc->regmap_hhi,
-				   pwrc_domain->desc.mem_pd[i].reg,
-				   pwrc_domain->desc.mem_pd[i].mask,
-				   pwrc_domain->desc.mem_pd[i].mask);
-
-	udelay(20);
-
-	if (pwrc_domain->desc.top_pd)
-		regmap_update_bits(pwrc_domain->pwrc->regmap_ao,
-				   pwrc_domain->desc.top_pd->iso_reg,
-				   pwrc_domain->desc.top_pd->iso_mask,
-				   pwrc_domain->desc.top_pd->iso_mask);
-
-	if (pwrc_domain->num_clks) {
-		msleep(20);
-		clk_bulk_disable_unprepare(pwrc_domain->num_clks,
-					   pwrc_domain->clks);
-	}
-
-	return 0;
-}
-
-static int meson_ee_pwrc_on(struct generic_pm_domain *domain)
-{
-	struct meson_ee_pwrc_domain *pwrc_domain =
-		container_of(domain, struct meson_ee_pwrc_domain, base);
-	int i, ret;
-
-	if (pwrc_domain->desc.top_pd)
-		regmap_update_bits(pwrc_domain->pwrc->regmap_ao,
-				   pwrc_domain->desc.top_pd->sleep_reg,
-				   pwrc_domain->desc.top_pd->sleep_mask, 0);
-	udelay(20);
-
-	for (i = 0 ; i < pwrc_domain->desc.mem_pd_count ; ++i)
-		regmap_update_bits(pwrc_domain->pwrc->regmap_hhi,
-				   pwrc_domain->desc.mem_pd[i].reg,
-				   pwrc_domain->desc.mem_pd[i].mask, 0);
-
-	udelay(20);
-
-	ret = reset_control_assert(pwrc_domain->rstc);
-	if (ret)
-		return ret;
-
-	if (pwrc_domain->desc.top_pd)
-		regmap_update_bits(pwrc_domain->pwrc->regmap_ao,
-				   pwrc_domain->desc.top_pd->iso_reg,
-				   pwrc_domain->desc.top_pd->iso_mask, 0);
-
-	ret = reset_control_deassert(pwrc_domain->rstc);
-	if (ret)
-		return ret;
-
-	return clk_bulk_prepare_enable(pwrc_domain->num_clks,
-				       pwrc_domain->clks);
-}
-
-static int meson_ee_pwrc_init_domain(struct platform_device *pdev,
-				     struct meson_ee_pwrc *pwrc,
-				     struct meson_ee_pwrc_domain *dom)
-{
-	int ret;
-
-	dom->pwrc = pwrc;
-	dom->num_rstc = dom->desc.reset_names_count;
-	dom->num_clks = dom->desc.clk_names_count;
-
-	if (dom->num_rstc) {
-		int count = reset_control_get_count(&pdev->dev);
-
-		if (count != dom->num_rstc)
-			dev_warn(&pdev->dev, "Invalid resets count %d for domain %s\n",
-				 count, dom->desc.name);
-
-		dom->rstc = devm_reset_control_array_get_exclusive(&pdev->dev);
-		if (IS_ERR(dom->rstc))
-			return PTR_ERR(dom->rstc);
-	}
-
-	if (dom->num_clks) {
-		int ret = devm_clk_bulk_get_all(&pdev->dev, &dom->clks);
-		if (ret < 0)
-			return ret;
-
-		if (dom->num_clks != ret) {
-			dev_warn(&pdev->dev, "Invalid clocks count %d for domain %s\n",
-				 ret, dom->desc.name);
-			dom->num_clks = ret;
-		}
-	}
-
-	dom->base.name = dom->desc.name;
-	dom->base.power_on = meson_ee_pwrc_on;
-	dom->base.power_off = meson_ee_pwrc_off;
-
-	/*
-         * TOFIX: This is a special case for the VPU power domain, which can
-	 * be enabled previously by the bootloader. In this case the VPU
-         * pipeline may be functional but no driver maybe never attach
-         * to this power domain, and if the domain is disabled it could
-         * cause system errors. This is why the pm_domain_always_on_gov
-         * is used here.
-         * For the same reason, the clocks should be enabled in case
-         * we need to power the domain off, otherwise the internal clocks
-         * prepare/enable counters won't be in sync.
-         */
-	if (dom->num_clks && dom->desc.is_powered_off && !dom->desc.is_powered_off(dom)) {
-		ret = clk_bulk_prepare_enable(dom->num_clks, dom->clks);
-		if (ret)
-			return ret;
-
-		dom->base.flags = GENPD_FLAG_ALWAYS_ON;
-		ret = pm_genpd_init(&dom->base, NULL, false);
-		if (ret)
-			return ret;
-	} else {
-		ret = pm_genpd_init(&dom->base, NULL,
-				    (dom->desc.is_powered_off ?
-				     dom->desc.is_powered_off(dom) : true));
-		if (ret)
-			return ret;
-	}
-
-	return 0;
-}
-
-static int meson_ee_pwrc_probe(struct platform_device *pdev)
-{
-	const struct meson_ee_pwrc_domain_data *match;
-	struct regmap *regmap_ao, *regmap_hhi;
-	struct device_node *parent_np;
-	struct meson_ee_pwrc *pwrc;
-	int i, ret;
-
-	match = of_device_get_match_data(&pdev->dev);
-	if (!match) {
-		dev_err(&pdev->dev, "failed to get match data\n");
-		return -ENODEV;
-	}
-
-	pwrc = devm_kzalloc(&pdev->dev, sizeof(*pwrc), GFP_KERNEL);
-	if (!pwrc)
-		return -ENOMEM;
-
-	pwrc->xlate.domains = devm_kcalloc(&pdev->dev, match->count,
-					   sizeof(*pwrc->xlate.domains),
-					   GFP_KERNEL);
-	if (!pwrc->xlate.domains)
-		return -ENOMEM;
-
-	pwrc->domains = devm_kcalloc(&pdev->dev, match->count,
-				     sizeof(*pwrc->domains), GFP_KERNEL);
-	if (!pwrc->domains)
-		return -ENOMEM;
-
-	pwrc->xlate.num_domains = match->count;
-
-	parent_np = of_get_parent(pdev->dev.of_node);
-	regmap_hhi = syscon_node_to_regmap(parent_np);
-	of_node_put(parent_np);
-	if (IS_ERR(regmap_hhi)) {
-		dev_err(&pdev->dev, "failed to get HHI regmap\n");
-		return PTR_ERR(regmap_hhi);
-	}
-
-	regmap_ao = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
-						    "amlogic,ao-sysctrl");
-	if (IS_ERR(regmap_ao)) {
-		dev_err(&pdev->dev, "failed to get AO regmap\n");
-		return PTR_ERR(regmap_ao);
-	}
-
-	pwrc->regmap_ao = regmap_ao;
-	pwrc->regmap_hhi = regmap_hhi;
-
-	platform_set_drvdata(pdev, pwrc);
-
-	for (i = 0 ; i < match->count ; ++i) {
-		struct meson_ee_pwrc_domain *dom = &pwrc->domains[i];
-
-		memcpy(&dom->desc, &match->domains[i], sizeof(dom->desc));
-
-		ret = meson_ee_pwrc_init_domain(pdev, pwrc, dom);
-		if (ret)
-			return ret;
-
-		pwrc->xlate.domains[i] = &dom->base;
-	}
-
-	return of_genpd_add_provider_onecell(pdev->dev.of_node, &pwrc->xlate);
-}
-
-static void meson_ee_pwrc_shutdown(struct platform_device *pdev)
-{
-	struct meson_ee_pwrc *pwrc = platform_get_drvdata(pdev);
-	int i;
-
-	for (i = 0 ; i < pwrc->xlate.num_domains ; ++i) {
-		struct meson_ee_pwrc_domain *dom = &pwrc->domains[i];
-
-		if (dom->desc.is_powered_off && !dom->desc.is_powered_off(dom))
-			meson_ee_pwrc_off(&dom->base);
-	}
-}
-
-static struct meson_ee_pwrc_domain_data meson_ee_g12a_pwrc_data = {
-	.count = ARRAY_SIZE(g12a_pwrc_domains),
-	.domains = g12a_pwrc_domains,
-};
-
-static struct meson_ee_pwrc_domain_data meson_ee_axg_pwrc_data = {
-	.count = ARRAY_SIZE(axg_pwrc_domains),
-	.domains = axg_pwrc_domains,
-};
-
-static struct meson_ee_pwrc_domain_data meson_ee_gxbb_pwrc_data = {
-	.count = ARRAY_SIZE(gxbb_pwrc_domains),
-	.domains = gxbb_pwrc_domains,
-};
-
-static struct meson_ee_pwrc_domain_data meson_ee_m8_pwrc_data = {
-	.count = ARRAY_SIZE(meson8_pwrc_domains),
-	.domains = meson8_pwrc_domains,
-};
-
-static struct meson_ee_pwrc_domain_data meson_ee_m8b_pwrc_data = {
-	.count = ARRAY_SIZE(meson8b_pwrc_domains),
-	.domains = meson8b_pwrc_domains,
-};
-
-static struct meson_ee_pwrc_domain_data meson_ee_sm1_pwrc_data = {
-	.count = ARRAY_SIZE(sm1_pwrc_domains),
-	.domains = sm1_pwrc_domains,
-};
-
-static const struct of_device_id meson_ee_pwrc_match_table[] = {
-	{
-		.compatible = "amlogic,meson8-pwrc",
-		.data = &meson_ee_m8_pwrc_data,
-	},
-	{
-		.compatible = "amlogic,meson8b-pwrc",
-		.data = &meson_ee_m8b_pwrc_data,
-	},
-	{
-		.compatible = "amlogic,meson8m2-pwrc",
-		.data = &meson_ee_m8b_pwrc_data,
-	},
-	{
-		.compatible = "amlogic,meson-axg-pwrc",
-		.data = &meson_ee_axg_pwrc_data,
-	},
-	{
-		.compatible = "amlogic,meson-gxbb-pwrc",
-		.data = &meson_ee_gxbb_pwrc_data,
-	},
-	{
-		.compatible = "amlogic,meson-g12a-pwrc",
-		.data = &meson_ee_g12a_pwrc_data,
-	},
-	{
-		.compatible = "amlogic,meson-sm1-pwrc",
-		.data = &meson_ee_sm1_pwrc_data,
-	},
-	{ /* sentinel */ }
-};
-MODULE_DEVICE_TABLE(of, meson_ee_pwrc_match_table);
-
-static struct platform_driver meson_ee_pwrc_driver = {
-	.probe = meson_ee_pwrc_probe,
-	.shutdown = meson_ee_pwrc_shutdown,
-	.driver = {
-		.name		= "meson_ee_pwrc",
-		.of_match_table	= meson_ee_pwrc_match_table,
-	},
-};
-module_platform_driver(meson_ee_pwrc_driver);
-MODULE_LICENSE("GPL v2");
diff --git a/drivers/soc/amlogic/meson-gx-pwrc-vpu.c b/drivers/soc/amlogic/meson-gx-pwrc-vpu.c
deleted file mode 100644
index 5d4f12800d93..000000000000
--- a/drivers/soc/amlogic/meson-gx-pwrc-vpu.c
+++ /dev/null
@@ -1,380 +0,0 @@
-/*
- * Copyright (c) 2017 BayLibre, SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <linux/of_address.h>
-#include <linux/platform_device.h>
-#include <linux/pm_domain.h>
-#include <linux/bitfield.h>
-#include <linux/regmap.h>
-#include <linux/mfd/syscon.h>
-#include <linux/of_device.h>
-#include <linux/reset.h>
-#include <linux/clk.h>
-#include <linux/module.h>
-
-/* AO Offsets */
-
-#define AO_RTI_GEN_PWR_SLEEP0		(0x3a << 2)
-
-#define GEN_PWR_VPU_HDMI		BIT(8)
-#define GEN_PWR_VPU_HDMI_ISO		BIT(9)
-
-/* HHI Offsets */
-
-#define HHI_MEM_PD_REG0			(0x40 << 2)
-#define HHI_VPU_MEM_PD_REG0		(0x41 << 2)
-#define HHI_VPU_MEM_PD_REG1		(0x42 << 2)
-#define HHI_VPU_MEM_PD_REG2		(0x4d << 2)
-
-struct meson_gx_pwrc_vpu {
-	struct generic_pm_domain genpd;
-	struct regmap *regmap_ao;
-	struct regmap *regmap_hhi;
-	struct reset_control *rstc;
-	struct clk *vpu_clk;
-	struct clk *vapb_clk;
-};
-
-static inline
-struct meson_gx_pwrc_vpu *genpd_to_pd(struct generic_pm_domain *d)
-{
-	return container_of(d, struct meson_gx_pwrc_vpu, genpd);
-}
-
-static int meson_gx_pwrc_vpu_power_off(struct generic_pm_domain *genpd)
-{
-	struct meson_gx_pwrc_vpu *pd = genpd_to_pd(genpd);
-	int i;
-
-	regmap_update_bits(pd->regmap_ao, AO_RTI_GEN_PWR_SLEEP0,
-			   GEN_PWR_VPU_HDMI_ISO, GEN_PWR_VPU_HDMI_ISO);
-	udelay(20);
-
-	/* Power Down Memories */
-	for (i = 0; i < 32; i += 2) {
-		regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG0,
-				   0x3 << i, 0x3 << i);
-		udelay(5);
-	}
-	for (i = 0; i < 32; i += 2) {
-		regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG1,
-				   0x3 << i, 0x3 << i);
-		udelay(5);
-	}
-	for (i = 8; i < 16; i++) {
-		regmap_update_bits(pd->regmap_hhi, HHI_MEM_PD_REG0,
-				   BIT(i), BIT(i));
-		udelay(5);
-	}
-	udelay(20);
-
-	regmap_update_bits(pd->regmap_ao, AO_RTI_GEN_PWR_SLEEP0,
-			   GEN_PWR_VPU_HDMI, GEN_PWR_VPU_HDMI);
-
-	msleep(20);
-
-	clk_disable_unprepare(pd->vpu_clk);
-	clk_disable_unprepare(pd->vapb_clk);
-
-	return 0;
-}
-
-static int meson_g12a_pwrc_vpu_power_off(struct generic_pm_domain *genpd)
-{
-	struct meson_gx_pwrc_vpu *pd = genpd_to_pd(genpd);
-	int i;
-
-	regmap_update_bits(pd->regmap_ao, AO_RTI_GEN_PWR_SLEEP0,
-			   GEN_PWR_VPU_HDMI_ISO, GEN_PWR_VPU_HDMI_ISO);
-	udelay(20);
-
-	/* Power Down Memories */
-	for (i = 0; i < 32; i += 2) {
-		regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG0,
-				   0x3 << i, 0x3 << i);
-		udelay(5);
-	}
-	for (i = 0; i < 32; i += 2) {
-		regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG1,
-				   0x3 << i, 0x3 << i);
-		udelay(5);
-	}
-	for (i = 0; i < 32; i += 2) {
-		regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG2,
-				   0x3 << i, 0x3 << i);
-		udelay(5);
-	}
-	for (i = 8; i < 16; i++) {
-		regmap_update_bits(pd->regmap_hhi, HHI_MEM_PD_REG0,
-				   BIT(i), BIT(i));
-		udelay(5);
-	}
-	udelay(20);
-
-	regmap_update_bits(pd->regmap_ao, AO_RTI_GEN_PWR_SLEEP0,
-			   GEN_PWR_VPU_HDMI, GEN_PWR_VPU_HDMI);
-
-	msleep(20);
-
-	clk_disable_unprepare(pd->vpu_clk);
-	clk_disable_unprepare(pd->vapb_clk);
-
-	return 0;
-}
-
-static int meson_gx_pwrc_vpu_setup_clk(struct meson_gx_pwrc_vpu *pd)
-{
-	int ret;
-
-	ret = clk_prepare_enable(pd->vpu_clk);
-	if (ret)
-		return ret;
-
-	ret = clk_prepare_enable(pd->vapb_clk);
-	if (ret)
-		clk_disable_unprepare(pd->vpu_clk);
-
-	return ret;
-}
-
-static int meson_gx_pwrc_vpu_power_on(struct generic_pm_domain *genpd)
-{
-	struct meson_gx_pwrc_vpu *pd = genpd_to_pd(genpd);
-	int ret;
-	int i;
-
-	regmap_update_bits(pd->regmap_ao, AO_RTI_GEN_PWR_SLEEP0,
-			   GEN_PWR_VPU_HDMI, 0);
-	udelay(20);
-
-	/* Power Up Memories */
-	for (i = 0; i < 32; i += 2) {
-		regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG0,
-				   0x3 << i, 0);
-		udelay(5);
-	}
-
-	for (i = 0; i < 32; i += 2) {
-		regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG1,
-				   0x3 << i, 0);
-		udelay(5);
-	}
-
-	for (i = 8; i < 16; i++) {
-		regmap_update_bits(pd->regmap_hhi, HHI_MEM_PD_REG0,
-				   BIT(i), 0);
-		udelay(5);
-	}
-	udelay(20);
-
-	ret = reset_control_assert(pd->rstc);
-	if (ret)
-		return ret;
-
-	regmap_update_bits(pd->regmap_ao, AO_RTI_GEN_PWR_SLEEP0,
-			   GEN_PWR_VPU_HDMI_ISO, 0);
-
-	ret = reset_control_deassert(pd->rstc);
-	if (ret)
-		return ret;
-
-	ret = meson_gx_pwrc_vpu_setup_clk(pd);
-	if (ret)
-		return ret;
-
-	return 0;
-}
-
-static int meson_g12a_pwrc_vpu_power_on(struct generic_pm_domain *genpd)
-{
-	struct meson_gx_pwrc_vpu *pd = genpd_to_pd(genpd);
-	int ret;
-	int i;
-
-	regmap_update_bits(pd->regmap_ao, AO_RTI_GEN_PWR_SLEEP0,
-			   GEN_PWR_VPU_HDMI, 0);
-	udelay(20);
-
-	/* Power Up Memories */
-	for (i = 0; i < 32; i += 2) {
-		regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG0,
-				   0x3 << i, 0);
-		udelay(5);
-	}
-
-	for (i = 0; i < 32; i += 2) {
-		regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG1,
-				   0x3 << i, 0);
-		udelay(5);
-	}
-
-	for (i = 0; i < 32; i += 2) {
-		regmap_update_bits(pd->regmap_hhi, HHI_VPU_MEM_PD_REG2,
-				   0x3 << i, 0);
-		udelay(5);
-	}
-
-	for (i = 8; i < 16; i++) {
-		regmap_update_bits(pd->regmap_hhi, HHI_MEM_PD_REG0,
-				   BIT(i), 0);
-		udelay(5);
-	}
-	udelay(20);
-
-	ret = reset_control_assert(pd->rstc);
-	if (ret)
-		return ret;
-
-	regmap_update_bits(pd->regmap_ao, AO_RTI_GEN_PWR_SLEEP0,
-			   GEN_PWR_VPU_HDMI_ISO, 0);
-
-	ret = reset_control_deassert(pd->rstc);
-	if (ret)
-		return ret;
-
-	ret = meson_gx_pwrc_vpu_setup_clk(pd);
-	if (ret)
-		return ret;
-
-	return 0;
-}
-
-static bool meson_gx_pwrc_vpu_get_power(struct meson_gx_pwrc_vpu *pd)
-{
-	u32 reg;
-
-	regmap_read(pd->regmap_ao, AO_RTI_GEN_PWR_SLEEP0, &reg);
-
-	return (reg & GEN_PWR_VPU_HDMI);
-}
-
-static struct meson_gx_pwrc_vpu vpu_hdmi_pd = {
-	.genpd = {
-		.name = "vpu_hdmi",
-		.power_off = meson_gx_pwrc_vpu_power_off,
-		.power_on = meson_gx_pwrc_vpu_power_on,
-	},
-};
-
-static struct meson_gx_pwrc_vpu vpu_hdmi_pd_g12a = {
-	.genpd = {
-		.name = "vpu_hdmi",
-		.power_off = meson_g12a_pwrc_vpu_power_off,
-		.power_on = meson_g12a_pwrc_vpu_power_on,
-	},
-};
-
-static int meson_gx_pwrc_vpu_probe(struct platform_device *pdev)
-{
-	const struct meson_gx_pwrc_vpu *vpu_pd_match;
-	struct regmap *regmap_ao, *regmap_hhi;
-	struct meson_gx_pwrc_vpu *vpu_pd;
-	struct device_node *parent_np;
-	struct reset_control *rstc;
-	struct clk *vpu_clk;
-	struct clk *vapb_clk;
-	bool powered_off;
-	int ret;
-
-	vpu_pd_match = of_device_get_match_data(&pdev->dev);
-	if (!vpu_pd_match) {
-		dev_err(&pdev->dev, "failed to get match data\n");
-		return -ENODEV;
-	}
-
-	vpu_pd = devm_kzalloc(&pdev->dev, sizeof(*vpu_pd), GFP_KERNEL);
-	if (!vpu_pd)
-		return -ENOMEM;
-
-	memcpy(vpu_pd, vpu_pd_match, sizeof(*vpu_pd));
-
-	parent_np = of_get_parent(pdev->dev.of_node);
-	regmap_ao = syscon_node_to_regmap(parent_np);
-	of_node_put(parent_np);
-	if (IS_ERR(regmap_ao)) {
-		dev_err(&pdev->dev, "failed to get regmap\n");
-		return PTR_ERR(regmap_ao);
-	}
-
-	regmap_hhi = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
-						     "amlogic,hhi-sysctrl");
-	if (IS_ERR(regmap_hhi)) {
-		dev_err(&pdev->dev, "failed to get HHI regmap\n");
-		return PTR_ERR(regmap_hhi);
-	}
-
-	rstc = devm_reset_control_array_get_exclusive(&pdev->dev);
-	if (IS_ERR(rstc))
-		return dev_err_probe(&pdev->dev, PTR_ERR(rstc),
-				     "failed to get reset lines\n");
-
-	vpu_clk = devm_clk_get(&pdev->dev, "vpu");
-	if (IS_ERR(vpu_clk)) {
-		dev_err(&pdev->dev, "vpu clock request failed\n");
-		return PTR_ERR(vpu_clk);
-	}
-
-	vapb_clk = devm_clk_get(&pdev->dev, "vapb");
-	if (IS_ERR(vapb_clk)) {
-		dev_err(&pdev->dev, "vapb clock request failed\n");
-		return PTR_ERR(vapb_clk);
-	}
-
-	vpu_pd->regmap_ao = regmap_ao;
-	vpu_pd->regmap_hhi = regmap_hhi;
-	vpu_pd->rstc = rstc;
-	vpu_pd->vpu_clk = vpu_clk;
-	vpu_pd->vapb_clk = vapb_clk;
-
-	platform_set_drvdata(pdev, vpu_pd);
-
-	powered_off = meson_gx_pwrc_vpu_get_power(vpu_pd);
-
-	/* If already powered, sync the clock states */
-	if (!powered_off) {
-		ret = meson_gx_pwrc_vpu_setup_clk(vpu_pd);
-		if (ret)
-			return ret;
-	}
-
-	vpu_pd->genpd.flags = GENPD_FLAG_ALWAYS_ON;
-	pm_genpd_init(&vpu_pd->genpd, NULL, powered_off);
-
-	return of_genpd_add_provider_simple(pdev->dev.of_node,
-					    &vpu_pd->genpd);
-}
-
-static void meson_gx_pwrc_vpu_shutdown(struct platform_device *pdev)
-{
-	struct meson_gx_pwrc_vpu *vpu_pd = platform_get_drvdata(pdev);
-	bool powered_off;
-
-	powered_off = meson_gx_pwrc_vpu_get_power(vpu_pd);
-	if (!powered_off)
-		vpu_pd->genpd.power_off(&vpu_pd->genpd);
-}
-
-static const struct of_device_id meson_gx_pwrc_vpu_match_table[] = {
-	{ .compatible = "amlogic,meson-gx-pwrc-vpu", .data = &vpu_hdmi_pd },
-	{
-	  .compatible = "amlogic,meson-g12a-pwrc-vpu",
-	  .data = &vpu_hdmi_pd_g12a
-	},
-	{ /* sentinel */ }
-};
-MODULE_DEVICE_TABLE(of, meson_gx_pwrc_vpu_match_table);
-
-static struct platform_driver meson_gx_pwrc_vpu_driver = {
-	.probe	= meson_gx_pwrc_vpu_probe,
-	.shutdown = meson_gx_pwrc_vpu_shutdown,
-	.driver = {
-		.name		= "meson_gx_pwrc_vpu",
-		.of_match_table	= meson_gx_pwrc_vpu_match_table,
-	},
-};
-module_platform_driver(meson_gx_pwrc_vpu_driver);
-MODULE_LICENSE("GPL v2");
diff --git a/drivers/soc/amlogic/meson-secure-pwrc.c b/drivers/soc/amlogic/meson-secure-pwrc.c
deleted file mode 100644
index 25b4b71df9b8..000000000000
--- a/drivers/soc/amlogic/meson-secure-pwrc.c
+++ /dev/null
@@ -1,231 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2019 Amlogic, Inc.
- * Author: Jianxin Pan <jianxin.pan@amlogic.com>
- */
-
-#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
-
-#include <linux/io.h>
-#include <linux/of_device.h>
-#include <linux/platform_device.h>
-#include <linux/pm_domain.h>
-#include <dt-bindings/power/meson-a1-power.h>
-#include <dt-bindings/power/meson-s4-power.h>
-#include <linux/arm-smccc.h>
-#include <linux/firmware/meson/meson_sm.h>
-#include <linux/module.h>
-
-#define PWRC_ON		1
-#define PWRC_OFF	0
-
-struct meson_secure_pwrc_domain {
-	struct generic_pm_domain base;
-	unsigned int index;
-	struct meson_secure_pwrc *pwrc;
-};
-
-struct meson_secure_pwrc {
-	struct meson_secure_pwrc_domain *domains;
-	struct genpd_onecell_data xlate;
-	struct meson_sm_firmware *fw;
-};
-
-struct meson_secure_pwrc_domain_desc {
-	unsigned int index;
-	unsigned int flags;
-	char *name;
-	bool (*is_off)(struct meson_secure_pwrc_domain *pwrc_domain);
-};
-
-struct meson_secure_pwrc_domain_data {
-	unsigned int count;
-	struct meson_secure_pwrc_domain_desc *domains;
-};
-
-static bool pwrc_secure_is_off(struct meson_secure_pwrc_domain *pwrc_domain)
-{
-	int is_off = 1;
-
-	if (meson_sm_call(pwrc_domain->pwrc->fw, SM_A1_PWRC_GET, &is_off,
-			  pwrc_domain->index, 0, 0, 0, 0) < 0)
-		pr_err("failed to get power domain status\n");
-
-	return is_off;
-}
-
-static int meson_secure_pwrc_off(struct generic_pm_domain *domain)
-{
-	int ret = 0;
-	struct meson_secure_pwrc_domain *pwrc_domain =
-		container_of(domain, struct meson_secure_pwrc_domain, base);
-
-	if (meson_sm_call(pwrc_domain->pwrc->fw, SM_A1_PWRC_SET, NULL,
-			  pwrc_domain->index, PWRC_OFF, 0, 0, 0) < 0) {
-		pr_err("failed to set power domain off\n");
-		ret = -EINVAL;
-	}
-
-	return ret;
-}
-
-static int meson_secure_pwrc_on(struct generic_pm_domain *domain)
-{
-	int ret = 0;
-	struct meson_secure_pwrc_domain *pwrc_domain =
-		container_of(domain, struct meson_secure_pwrc_domain, base);
-
-	if (meson_sm_call(pwrc_domain->pwrc->fw, SM_A1_PWRC_SET, NULL,
-			  pwrc_domain->index, PWRC_ON, 0, 0, 0) < 0) {
-		pr_err("failed to set power domain on\n");
-		ret = -EINVAL;
-	}
-
-	return ret;
-}
-
-#define SEC_PD(__name, __flag)			\
-[PWRC_##__name##_ID] =				\
-{						\
-	.name = #__name,			\
-	.index = PWRC_##__name##_ID,		\
-	.is_off = pwrc_secure_is_off,	\
-	.flags = __flag,			\
-}
-
-static struct meson_secure_pwrc_domain_desc a1_pwrc_domains[] = {
-	SEC_PD(DSPA,	0),
-	SEC_PD(DSPB,	0),
-	/* UART should keep working in ATF after suspend and before resume */
-	SEC_PD(UART,	GENPD_FLAG_ALWAYS_ON),
-	/* DMC is for DDR PHY ana/dig and DMC, and should be always on */
-	SEC_PD(DMC,	GENPD_FLAG_ALWAYS_ON),
-	SEC_PD(I2C,	0),
-	SEC_PD(PSRAM,	0),
-	SEC_PD(ACODEC,	0),
-	SEC_PD(AUDIO,	0),
-	SEC_PD(OTP,	0),
-	SEC_PD(DMA,	GENPD_FLAG_ALWAYS_ON | GENPD_FLAG_IRQ_SAFE),
-	SEC_PD(SD_EMMC,	0),
-	SEC_PD(RAMA,	0),
-	/* SRAMB is used as ATF runtime memory, and should be always on */
-	SEC_PD(RAMB,	GENPD_FLAG_ALWAYS_ON),
-	SEC_PD(IR,	0),
-	SEC_PD(SPICC,	0),
-	SEC_PD(SPIFC,	0),
-	SEC_PD(USB,	0),
-	/* NIC is for the Arm NIC-400 interconnect, and should be always on */
-	SEC_PD(NIC,	GENPD_FLAG_ALWAYS_ON),
-	SEC_PD(PDMIN,	0),
-	SEC_PD(RSA,	0),
-};
-
-static struct meson_secure_pwrc_domain_desc s4_pwrc_domains[] = {
-	SEC_PD(S4_DOS_HEVC,	0),
-	SEC_PD(S4_DOS_VDEC,	0),
-	SEC_PD(S4_VPU_HDMI,	0),
-	SEC_PD(S4_USB_COMB,	0),
-	SEC_PD(S4_GE2D,		0),
-	/* ETH is for ethernet online wakeup, and should be always on */
-	SEC_PD(S4_ETH,		GENPD_FLAG_ALWAYS_ON),
-	SEC_PD(S4_DEMOD,	0),
-	SEC_PD(S4_AUDIO,	0),
-};
-
-static int meson_secure_pwrc_probe(struct platform_device *pdev)
-{
-	int i;
-	struct device_node *sm_np;
-	struct meson_secure_pwrc *pwrc;
-	const struct meson_secure_pwrc_domain_data *match;
-
-	match = of_device_get_match_data(&pdev->dev);
-	if (!match) {
-		dev_err(&pdev->dev, "failed to get match data\n");
-		return -ENODEV;
-	}
-
-	sm_np = of_find_compatible_node(NULL, NULL, "amlogic,meson-gxbb-sm");
-	if (!sm_np) {
-		dev_err(&pdev->dev, "no secure-monitor node\n");
-		return -ENODEV;
-	}
-
-	pwrc = devm_kzalloc(&pdev->dev, sizeof(*pwrc), GFP_KERNEL);
-	if (!pwrc) {
-		of_node_put(sm_np);
-		return -ENOMEM;
-	}
-
-	pwrc->fw = meson_sm_get(sm_np);
-	of_node_put(sm_np);
-	if (!pwrc->fw)
-		return -EPROBE_DEFER;
-
-	pwrc->xlate.domains = devm_kcalloc(&pdev->dev, match->count,
-					   sizeof(*pwrc->xlate.domains),
-					   GFP_KERNEL);
-	if (!pwrc->xlate.domains)
-		return -ENOMEM;
-
-	pwrc->domains = devm_kcalloc(&pdev->dev, match->count,
-				     sizeof(*pwrc->domains), GFP_KERNEL);
-	if (!pwrc->domains)
-		return -ENOMEM;
-
-	pwrc->xlate.num_domains = match->count;
-	platform_set_drvdata(pdev, pwrc);
-
-	for (i = 0 ; i < match->count ; ++i) {
-		struct meson_secure_pwrc_domain *dom = &pwrc->domains[i];
-
-		if (!match->domains[i].index)
-			continue;
-
-		dom->pwrc = pwrc;
-		dom->index = match->domains[i].index;
-		dom->base.name = match->domains[i].name;
-		dom->base.flags = match->domains[i].flags;
-		dom->base.power_on = meson_secure_pwrc_on;
-		dom->base.power_off = meson_secure_pwrc_off;
-
-		pm_genpd_init(&dom->base, NULL, match->domains[i].is_off(dom));
-
-		pwrc->xlate.domains[i] = &dom->base;
-	}
-
-	return of_genpd_add_provider_onecell(pdev->dev.of_node, &pwrc->xlate);
-}
-
-static struct meson_secure_pwrc_domain_data meson_secure_a1_pwrc_data = {
-	.domains = a1_pwrc_domains,
-	.count = ARRAY_SIZE(a1_pwrc_domains),
-};
-
-static struct meson_secure_pwrc_domain_data meson_secure_s4_pwrc_data = {
-	.domains = s4_pwrc_domains,
-	.count = ARRAY_SIZE(s4_pwrc_domains),
-};
-
-static const struct of_device_id meson_secure_pwrc_match_table[] = {
-	{
-		.compatible = "amlogic,meson-a1-pwrc",
-		.data = &meson_secure_a1_pwrc_data,
-	},
-	{
-		.compatible = "amlogic,meson-s4-pwrc",
-		.data = &meson_secure_s4_pwrc_data,
-	},
-	{ /* sentinel */ }
-};
-MODULE_DEVICE_TABLE(of, meson_secure_pwrc_match_table);
-
-static struct platform_driver meson_secure_pwrc_driver = {
-	.probe = meson_secure_pwrc_probe,
-	.driver = {
-		.name		= "meson_secure_pwrc",
-		.of_match_table	= meson_secure_pwrc_match_table,
-	},
-};
-module_platform_driver(meson_secure_pwrc_driver);
-MODULE_LICENSE("Dual MIT/GPL");