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authorLinus Torvalds <torvalds@linux-foundation.org>2015-07-03 00:40:49 +0300
committerLinus Torvalds <torvalds@linux-foundation.org>2015-07-03 00:40:49 +0300
commitd4113f2f174aea83f0871cf5d050e0e08dfb9781 (patch)
treea90fcadcbb6b92e2ad37274dc973323aaf6d1b57 /drivers/soc
parent848077270ddc128d5f01ea0821295d22a39ea5b6 (diff)
parentae41a0b7ed7740009b9ec87c7dc05b23f01d361a (diff)
downloadlinux-d4113f2f174aea83f0871cf5d050e0e08dfb9781.tar.xz
Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC late fixes and dependencies from Kevin Hilman: "This is a collection of a few late fixes and other misc stuff that had dependencies on things being merged from other trees. Other than the fixes, the primary feature being added is the conversion of some OMAP drivers to the new generic wakeirq interface" * tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: multi_v7_defconfig: Enable BRCMNAND driver ARM: BCM: Do not select CONFIG_MTD_NAND_BRCMNAND ARM: at91/dt: update udc compatible strings ARM: at91/dt: trivial: fix USB udc compatible string arm64: dts: Add APM X-Gene standby GPIO controller DTS entries soc: qcom: spm: Fix idle on THUMB2 kernels ARM: dove: fix legacy dove IRQ numbers ARM: mvebu: fix suspend to RAM on big-endian configurations ARM: mvebu: adjust Armada XP DT spi muxing after pinctrl function rename serial: 8250_omap: Move wake-up interrupt to generic wakeirq serial: omap: Switch wake-up interrupt to generic wakeirq mmc: omap_hsmmc: Change wake-up interrupt to use generic wakeirq
Diffstat (limited to 'drivers/soc')
-rw-r--r--drivers/soc/qcom/spm.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/soc/qcom/spm.c b/drivers/soc/qcom/spm.c
index b562af816c0a..b04b05a0904e 100644
--- a/drivers/soc/qcom/spm.c
+++ b/drivers/soc/qcom/spm.c
@@ -260,7 +260,7 @@ static int __init qcom_cpuidle_init(struct device_node *cpu_node, int cpu)
/* We have atleast one power down mode */
cpumask_clear(&mask);
cpumask_set_cpu(cpu, &mask);
- qcom_scm_set_warm_boot_addr(cpu_resume, &mask);
+ qcom_scm_set_warm_boot_addr(cpu_resume_arm, &mask);
}
per_cpu(qcom_idle_ops, cpu) = fns;