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authorJoy Chakraborty <joychakr@google.com>2023-05-12 13:47:44 +0300
committerMark Brown <broonie@kernel.org>2023-05-15 04:46:17 +0300
commit020a3947e7f18e790cc72785281755f8c49e11d4 (patch)
tree820a48a67b87bc4fa8b434b531568f958ee39d8b /drivers/spi/spi-dw.h
parentd1ca1c5297ba9260942c0b3f1171a98a432bdfec (diff)
downloadlinux-020a3947e7f18e790cc72785281755f8c49e11d4.tar.xz
spi: dw: Add DMA address widths capability check
Store address width capabilities of DMA controller during init and check the same per transfer to make sure the bits/word requirement can be met. Current DW DMA driver requires both tx and rx channel to be configured and functional hence a subset of both tx and rx channel address width capability is checked with the width requirement(n_bytes) for a transfer. * tested on Baikal-T1 based system with DW SPI-looped back interface transferring a chunk of data with DFS:8,12,16. Signed-off-by: Joy Chakraborty <joychakr@google.com Reviewed-by: Serge Semin <fancer.lancer@gmail.com Tested-by: Serge Semin <fancer.lancer@gmail.com Link: https://lore.kernel.org/r/20230512104746.1797865-3-joychakr@google.com Signed-off-by: Mark Brown <broonie@kernel.org
Diffstat (limited to 'drivers/spi/spi-dw.h')
-rw-r--r--drivers/spi/spi-dw.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/spi/spi-dw.h b/drivers/spi/spi-dw.h
index 9e8eb2b52d5c..3962e6dcf880 100644
--- a/drivers/spi/spi-dw.h
+++ b/drivers/spi/spi-dw.h
@@ -190,6 +190,7 @@ struct dw_spi {
struct dma_chan *rxchan;
u32 rxburst;
u32 dma_sg_burst;
+ u32 dma_addr_widths;
unsigned long dma_chan_busy;
dma_addr_t dma_addr; /* phy address of the Data register */
const struct dw_spi_dma_ops *dma_ops;