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authorWeike Chen <alvin.chen@intel.com>2014-11-26 13:35:10 +0300
committerMark Brown <broonie@kernel.org>2014-11-26 21:07:45 +0300
commite5262d0568dc9e10de79a726dfd7edb712a2c10b (patch)
treefb8cd4ca58e8f0ef1b1a016ac88139401ed55cfe /drivers/spi/spi-pxa2xx-pci.c
parent4fdb2424cc4499237197a8c9d35b34d68c750475 (diff)
downloadlinux-e5262d0568dc9e10de79a726dfd7edb712a2c10b.tar.xz
spi: spi-pxa2xx: SPI support for Intel Quark X1000
There are two SPI controllers exported by PCI subsystem for Intel Quark X1000. The SPI memory mapped I/O registers supported by Quark are different from the current implementation, and Quark only supports the registers of 'SSCR0', 'SSCR1', 'SSSR', 'SSDR', and 'DDS_RATE'. This patch is to enable the SPI for Intel Quark X1000. This piece of work is derived from Dan O'Donovan's initial work for Intel Quark X1000 SPI enabling. Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Weike Chen <alvin.chen@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi/spi-pxa2xx-pci.c')
-rw-r--r--drivers/spi/spi-pxa2xx-pci.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/spi/spi-pxa2xx-pci.c b/drivers/spi/spi-pxa2xx-pci.c
index 6beee8ce2d68..fa7399e84bbb 100644
--- a/drivers/spi/spi-pxa2xx-pci.c
+++ b/drivers/spi/spi-pxa2xx-pci.c
@@ -19,6 +19,7 @@ enum {
PORT_BSW0,
PORT_BSW1,
PORT_BSW2,
+ PORT_QUARK_X1000,
};
struct pxa_spi_info {
@@ -92,6 +93,12 @@ static struct pxa_spi_info spi_info_configs[] = {
.tx_param = &bsw2_tx_param,
.rx_param = &bsw2_rx_param,
},
+ [PORT_QUARK_X1000] = {
+ .type = QUARK_X1000_SSP,
+ .port_id = -1,
+ .num_chipselect = 1,
+ .max_clk_rate = 50000000,
+ },
};
static int pxa2xx_spi_pci_probe(struct pci_dev *dev,
@@ -191,6 +198,7 @@ static void pxa2xx_spi_pci_remove(struct pci_dev *dev)
static const struct pci_device_id pxa2xx_spi_pci_devices[] = {
{ PCI_VDEVICE(INTEL, 0x2e6a), PORT_CE4100 },
+ { PCI_VDEVICE(INTEL, 0x0935), PORT_QUARK_X1000 },
{ PCI_VDEVICE(INTEL, 0x0f0e), PORT_BYT },
{ PCI_VDEVICE(INTEL, 0x228e), PORT_BSW0 },
{ PCI_VDEVICE(INTEL, 0x2290), PORT_BSW1 },