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authorTudor Ambarus <tudor.ambarus@linaro.org>2024-02-16 10:05:48 +0300
committerMark Brown <broonie@kernel.org>2024-03-05 23:42:53 +0300
commit414d7b8c9147db7dc34c0e2bae2e2361b922dc07 (patch)
tree50aa9f5f598e0b0c7f1ddc5edd48b4de0bbbbcbd /drivers/spi/spi-s3c64xx.c
parentc6e776ab6abdfce5a1edcde7a22c639e76499939 (diff)
downloadlinux-414d7b8c9147db7dc34c0e2bae2e2361b922dc07.tar.xz
spi: s3c64xx: retrieve the FIFO depth from the device tree
There are SoCs that configure different FIFO depths for their instances of the SPI IP. See the fifo_lvl_mask defined for exynos4_spi_port_config for example: .fifo_lvl_mask = { 0x1ff, 0x7F, 0x7F }, The first instance of the IP is configured with 256 bytes FIFOs, whereas the last two are configured with 64 bytes FIFOs. Instead of mangling with the .fifo_lvl_mask and its dependency of the DT alias ID, allow such SoCs to determine the FIFO depth via the ``fifo-depth`` DT property. Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://msgid.link/r/20240216070555.2483977-6-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi/spi-s3c64xx.c')
-rw-r--r--drivers/spi/spi-s3c64xx.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
index 72572e23cde5..b1c63f75021d 100644
--- a/drivers/spi/spi-s3c64xx.c
+++ b/drivers/spi/spi-s3c64xx.c
@@ -1263,7 +1263,9 @@ static int s3c64xx_spi_probe(struct platform_device *pdev)
sdd->port_id = pdev->id;
}
- sdd->fifo_depth = FIFO_DEPTH(sdd);
+ if (of_property_read_u32(pdev->dev.of_node, "fifo-depth",
+ &sdd->fifo_depth))
+ sdd->fifo_depth = FIFO_DEPTH(sdd);
s3c64xx_spi_set_fifomask(sdd);